[Bug target/122076] [RISCV] [Miscompile] GCC - riscv64 target, miscompiles at -O3 as well as -O2

[rguenth at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=122076

Richard Biener <rguenth at gcc dot gnu.org> changed:

           What    |Removed                     |Added
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           Keywords|                            |needs-bisection, wrong-code

--- Comment #2 from Richard Biener <rguenth at gcc dot gnu.org> ---
The noted rev isn't a bisection, it's a fortran FE change.