https://gcc.gnu.org/bugzilla/show_bug.cgi?id=121652

--- Comment #23 from GCC Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by Jeff Law <[email protected]>:

https://gcc.gnu.org/g:60c6f92fb192352d784ab3153a9e11c19a3216a0

commit r16-4191-g60c6f92fb192352d784ab3153a9e11c19a3216a0
Author: Aurelien Jarno <[email protected]>
Date:   Thu Oct 2 09:05:34 2025 -0600

    [PATCH v2] RISC-V: fix __builtin_round NaN handling [PR target/121652]

    __builtin_round() fails to correctly generate invalid exceptions for NaN
    inputs when -ftrapping-math is used (which is the default). According to
    the specification, an invalid exception should be raised for sNaN, but
    not for qNaN.

    Commit f12a27216952 ("RISC-V: fix __builtin_round clobbering FP...")
    attempted to avoid raising an invalid exception for qNaN by saving and
    restoring the FP exception flags. However this inadvertently suppressed
    the invalid exception for sNaN as well.

    Instead of saving/restoring fflags, this patch uses the same approach
    than the well tested GLIBC round implementation. When flag_trapping_math
    is enabled, it first checks whether the input is a NaN using feq.s/d. In
    that case it adds the input value with itself to possibly convert sNaN
    into qNaN. With this change, the glibc testsuite passes again.

    The generated code with -ftrapping-math now looks like:

    convert_float_to_float_round
      feq.s       a5,fa0,fa0
      beqz        a5,.L6
      auipc       a5,0x0
      flw         fa4,42(a5)
      fabs.s      fa5,fa0
      flt.s       a5,fa5,fa4
      beqz        a5,.L5
      fcvt.w.s    a5,fa0,rmm
      fcvt.s.w    fa5,a5
      fsgnj.s     fa0,fa5,fa0
      ret
    .L6:
      fadd.s      fa0,fa0,fa0
    .L5:
      ret

    With -fno-trapping-math, the additional checks are omitted so the
    resulting code is unchanged.

    In addition this fixes the following failures:
    FAIL: gcc.target/riscv/rvv/autovec/vls/math-nearbyint-1.c -O3
-ftree-vectorize -mrvv-vector-bits=scalable  scan-assembler-times
frflags\\s+[atx][0-9]+ 32
    FAIL: gcc.target/riscv/rvv/autovec/vls/math-nearbyint-1.c -O3
-ftree-vectorize -mrvv-vector-bits=scalable  scan-assembler-times
fsflags\\s+[atx][0-9]+ 32

    Fixes: f652a35877e3 ("This is almost exclusively Jivan's work....")
    Fixes: f12a27216952 ("RISC-V: fix __builtin_round clobbering FP...")

            PR target/121652

    gcc/ChangeLog:

            * config/riscv/riscv.md (round_pattern): special case NaN input
            instead of saving/restoring fflags.

    gcc/testsuite/ChangeLog:

            * gcc.target/riscv/rvv/autovec/vls/math-nearbyint-1.c: Adjust
            scan pattern for fewer instances of frflags/fsrflags.

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