https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101639
--- Comment #17 from Hongtao Liu <liuhongt at gcc dot gnu.org> ---
(In reply to Richard Biener from comment #15)
> Created attachment 62554 [details]
> patch series with "dummy" x86 reduc_mask_and_scal_qi
>
> The following is sth to experiment with. It doesn't implement the
> zero/sign-extension of sub-QImode masks (or for GCN which has all DImode,
> for most of vectors?), instead refuses to use those.
>
> I need some help with the actual patterns for x86. We'd need
> DI,SI,HI,QI,Vn{DI,SI,HI,QI} I guess. Depending on movmask availability, of
> course.
I'll handle those patterns, may take couple days and get back to you.
