[Bug target/122431] New: Bitwise multiplexing has too much latency on POWER

[tkoenig at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=122431

            Bug ID: 122431
           Summary: Bitwise multiplexing has too much latency on POWER
           Product: gcc
           Version: 16.0
            Status: UNCONFIRMED
          Severity: enhancement
          Priority: P3
         Component: target
          Assignee: unassigned at gcc dot gnu.org
          Reporter: tkoenig at gcc dot gnu.org
  Target Milestone: ---

Consider

unsigned long mux(unsigned long int a, unsigned long int b,
                  unsigned long int c)
{
  return ( a & b ) | ( ~a & c );
}

which is translated to (using a fairly recent trunk)

mux:
.LFB0:
        .cfi_startproc
        .localentry     mux,1
        xor 2,5,4
        and 2,2,3
        xor 3,2,5
        blr

This has a dependency of the second on the first, and the third
on the second instructions.

The more straightforward

        and 4, 4, 3
        andc 3, 5, 3
        or 3, 3, 4
        blr

would not introduce a dependency, and thus could reduce the latency.