https://gcc.gnu.org/bugzilla/show_bug.cgi?id=122536
--- Comment #4 from Jeffrey A. Law <law at gcc dot gnu.org> ---
I can't reproduce with the intel_uncore.i.xz either (and yes I've got RTL
checking enabled). Unfortunate.
Sam, if you can easily do so, give this a whirl. I'm pretty confident at this
point those conditions were supposed to guard against this exact scenario and
just got the test slightly wrong. I'll start them through a test cycle here on
the assumption this will fix the problem.
diff --git a/gcc/simplify-rtx.cc b/gcc/simplify-rtx.cc
index 989cf9c2c82f..53592d2a2f4d 100644
--- a/gcc/simplify-rtx.cc
+++ b/gcc/simplify-rtx.cc
@@ -3686,8 +3686,8 @@ simplify_context::simplify_binary_operation_1 (rtx_code
code,
&& XEXP (op0, 1) == CONST1_RTX (mode)
&& XEXP (op1, 1) == CONST1_RTX (mode)
/* Verify bit positions (for cases with variable bit position). */
- && CONST_INT_P (XEXP (op0, 1))
- && CONST_INT_P (XEXP (op1, 1)))
+ && CONST_INT_P (XEXP (XEXP (op0, 0), 1))
+ && CONST_INT_P (XEXP (XEXP (op1, 0), 1)))
{
unsigned HOST_WIDE_INT bitpos1 = INTVAL (XEXP (XEXP (op0, 0), 1));
unsigned HOST_WIDE_INT bitpos2 = INTVAL (XEXP (XEXP (op1, 0), 1));
@@ -3718,7 +3718,7 @@ simplify_context::simplify_binary_operation_1 (rtx_code
code,
&& XEXP (op0, 1) == CONST1_RTX (mode)
&& XEXP (op1, 1) == CONST0_RTX (mode)
/* Verify bit position. */
- && CONST_INT_P (XEXP (op0, 1)))
+ && CONST_INT_P (XEXP (XEXP (op0, 0), 1)))
{
unsigned HOST_WIDE_INT bitpos1 = INTVAL (XEXP (XEXP (op0, 0), 1));
unsigned HOST_WIDE_INT mask
