https://gcc.gnu.org/bugzilla/show_bug.cgi?id=122665
--- Comment #4 from Segher Boessenkool <segher at gcc dot gnu.org> --- (In reply to Jeevitha from comment #3) > (In reply to Segher Boessenkool from comment #2) > > Yup. But you need to widen the inputs to 64 bits before the multiplication, > > that's how RTL works (if you don't, you lose bits). How that works for > > vectors I don't know. We always could do an unspec, but it is nicer to > > actually describe what happens :-) > > Sure, I will use unspec. Thanks! I don't think in this case an unspec will make us lose much. > I have one more question: why are we including this > pattern in the vsx.md file? Since this instruction uses only Altivec > registers, shouldn’t we define it in altivec.md instead? All these files are essentially concatenated together, so it doesn't matter much where they are defined -- but altivec.md for the patterns that can only use vector registers (not all vector scalar registers) makes sense, yea. > Also, can we use > altivec_register_operand instead of vsx_register_operand as predicates? We have to, even!
