[Bug rtl-optimization/123094] [15/16 Regression] AArch64 armv9-a: ICE at -O2 during RTL pass: cse2

[acoplan at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=123094

Alex Coplan <acoplan at gcc dot gnu.org> changed:

           What    |Removed                     |Added
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                 CC|                            |acoplan at gcc dot gnu.org

--- Comment #4 from Alex Coplan <acoplan at gcc dot gnu.org> ---
Here is a bit more of a cleaned-up testcase which is a bit more readable:

typedef char __attribute__((vector_size(4))) v4qi;
typedef short __attribute__((vector_size(2 * sizeof(short)))) v2hi;
typedef short __attribute__((vector_size(8 * sizeof(short)))) v8hi;
typedef int __attribute__((vector_size(8 * sizeof(int)))) v8si;
typedef long __attribute__((vector_size(2 * sizeof(long)))) v2di;
typedef long __attribute__((vector_size(4 * sizeof(long)))) v4di;
typedef long __attribute__((vector_size(8 * sizeof(long)))) v8di;
typedef long __attribute__((vector_size(32 * sizeof(long)))) v32di;
v4qi f, h;
long g;
int i(v2di) {
  v32di j, k;
  v4qi l = __builtin_convertvector(__builtin_shufflevector(k, j, 34, 1, 9, 7),
v4qi);
  f = (v4qi){l[3]};
}
v4di m() {
  if (g)
    if (h[0])
      return (v4di){3};
  int n = i(__builtin_convertvector((v2hi)1, v2di));
  return __builtin_shufflevector(
      __builtin_convertvector(
          (v8hi){1, 1, 1, 1, 1, 1, 1},
          v8di),
      __builtin_convertvector((v8si){n}, v8di),
      2, 11, 4, 6);
}