https://gcc.gnu.org/bugzilla/show_bug.cgi?id=123070
--- Comment #12 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
So what seems to be happening is that in the case with the 2 zeros bb's.
The register allocator is able to coalesce the 2 registers for ivtmp.7_15/_3
and with the return (eax on x86 and r0 on aarch64):
_3 = (int *) ivtmp.7_15;
_4 = MEM[(int *)_3];
```
(insn 23 22 24 5 (set (reg/f:DI 110 [ <retval> ])
(reg:DI 102 [ ivtmp.7 ])) "/app/example.cpp":13:14 -1
(nil))
(insn 24 23 25 5 (set (reg:SI 116)
(mem:SI (reg/f:DI 110 [ <retval> ]) [2 MEM[(int *)_3]+0 S4 A32]))
"/app/example.cpp":13:5 -1
(nil))
```
But for some reason without the extra bb, there is a conflict and the register
allocator decides they conflict.
I have not looked further than that at this point.
