https://gcc.gnu.org/bugzilla/show_bug.cgi?id=123492
--- Comment #2 from GCC Commits <cvs-commit at gcc dot gnu.org> --- The master branch has been updated by Peter Bergner <[email protected]>: https://gcc.gnu.org/g:b8634a0b929cdd6b37275828d6a9fd390b5900c7 commit r16-6653-gb8634a0b929cdd6b37275828d6a9fd390b5900c7 Author: Peter Bergner <[email protected]> Date: Thu Jan 8 20:41:20 2026 -0600 RISC-V: Update tt-ascalon-d8's extension list [PR123492] The Ascalon core implements the full RVA23 profile plus a few other optional extensions. However, the -mcpu=tt-ascalon-d8 option doesn't enable them all. Add the missing extensions. 2026-01-08 Peter Bergner <[email protected]> gcc/ PR target/123492 * config/riscv/riscv-cores.def (RISCV_CORE)<tt-ascalon-d8>: Add missing extensions via use of rva23s64 profile and adding zkr, smaia, smmpm, smnpm, smrnmi, smstateen, ssaia, ssstrict, svadu. Signed-off-by: Peter Bergner <[email protected]>
