https://gcc.gnu.org/bugzilla/show_bug.cgi?id=123144
--- Comment #6 from Avinash Jayakar <avinashd at gcc dot gnu.org> ---
I checked this test case with the latest trunk and do not see the ICE.
But I was not able to narrow down why this latent issue happens. I see that it
happens only with mcpu=power8, I am thinking it is mostly contraint or cost
issue, but not able to narrow down what exactly is triggering it.
The assertion error happens when this insn
(insn 309 308 175 20 (parallel [
(set (reg:SI 256 [ _23 ])
(vec_select:SI (reg:V4SI 303)
(parallel [
(const_int 2 [0x2])
])))
(clobber (scratch:V4SI))
]) "test.c":39:33 1431 {vsx_extract_v4si_w1}
(expr_list:REG_DEAD (reg:V4SI 303)
(nil)))
expands which has attribute "type" as mfvsr. If I change that type to *, the
ICE does not happen.
;; Extract from word 1 (BE order).
(define_insn "vsx_extract_v4si_w1"
[(set (match_operand:SI 0 "nonimmediate_operand" "=r,wa,Z,wa")
(vec_select:SI
(match_operand:V4SI 1 "gpc_reg_operand" "v,v,v,0")
(parallel [(match_operand:QI 2 "const_0_to_3_operand" "n,n,n,n")])))
(clobber (match_scratch:V4SI 3 "=v,v,v,v"))]
"TARGET_DIRECT_MOVE_64BIT
&& INTVAL (operands[2]) == (BYTES_BIG_ENDIAN ? 1 : 2)"
{
if (which_alternative == 0)
return "mfvsrwz %0,%x1";
if (which_alternative == 1)
return "xxlor %x0,%x1,%x1";
if (which_alternative == 2)
return "stxsiwx %x1,%y0";
return ASM_COMMENT_START " vec_extract to same register";
}
[(set_attr "type" "mfvsr,veclogical,fpstore,*")
(set_attr "length" "4,4,4,0")
(set_attr "isa" "p8v,*,p8v,*")])
