[Bug target/123824] riscv: Incorrect passing of VLS vectors via the stack.

[rdapp at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=123824

--- Comment #1 from Robin Dapp <rdapp at gcc dot gnu.org> ---
To be clear: We generally do the right thing.  It's just this special case when
a vector doesn't fully fit that we don't handle properly.

And for the following code (just increasing the vector size to 32) I think we
could do better in terms of code-gen.  But I'll split that out.

typedef int v4si __attribute__ ((vector_size (32)));
int test (int accumulator, v4si v1, v4si v2, v4si v3, v4si v4)
{
  accumulator &= v4[0] & v4[1] & v4[2] & v4[3];
  return accumulator;
}