https://gcc.gnu.org/bugzilla/show_bug.cgi?id=123885
Bug ID: 123885
Summary: Improve conditional operations on 32bit objects for
RISC-V (rv64)
Product: gcc
Version: unknown
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component: rtl-optimization
Assignee: unassigned at gcc dot gnu.org
Reporter: law at gcc dot gnu.org
Target Milestone: ---
This is meant to be a simple example of a general problem. Specifically that
we could improve the generated code for conditional 32bit ops on rv64. Let's
take this case:
int foo(int x) {
if (x < 5) {
x = x << 2;
}
return x;
}
Compiled with -O2 -march=rv64gcb_zicond we get:
li a5,4 # 6 [c=4 l=4] *movdi_64bit/1
sgt a5,a0,a5 # 38 [c=4 l=4] *sgt_didi
slliw a4,a0,2 # 35 [c=8 l=4] ashlsi3_extend
czero.nez a4,a4,a5 # 40 [c=4 l=4] *czero.nez.didi
czero.eqz a0,a0,a5 # 39 [c=4 l=4] *czero.eqz.didi
add a0,a4,a0 # 18 [c=4 l=4] *adddi3/0
ret # 57 [c=0 l=4] simple_return
Instead of selecting between the original value and the shifted value, we can
select between a shift count of 2 or 0 and do a slliw using that result.
The same issue arises with most, if not all, of the "w" forms of arithmetic,
shifts and rotates.
