https://gcc.gnu.org/bugzilla/show_bug.cgi?id=124335
--- Comment #6 from GCC Commits <cvs-commit at gcc dot gnu.org> --- The releases/gcc-15 branch has been updated by Jakub Jelinek <[email protected]>: https://gcc.gnu.org/g:e8edba9551d2996ec0b85cee9a1c468df6a74eaf commit r15-10908-ge8edba9551d2996ec0b85cee9a1c468df6a74eaf Author: Jakub Jelinek <[email protected]> Date: Tue Mar 3 09:50:44 2026 +0100 i386: Fix up *avx512f_load<mode>_mask for -masm=intel [PR124335] The Intel syntax part is missing % before 3, so it always prints {3} rather than {k1} or similar. Fixed thusly. 2026-03-03 Jakub Jelinek <[email protected]> PR target/124335 * config/i386/sse.md (*avx512f_load<mode>_mask): Use %{%3%} instead of %{3%} for -masm=intel syntax. * gcc.target/i386/avx512fp16-pr124335.c: New test. (cherry picked from commit b3502a668627caa7f49609a36dbeaf088f17037c)
