https://gcc.gnu.org/bugzilla/show_bug.cgi?id=123271
--- Comment #5 from Richard Earnshaw <rearnsha at gcc dot gnu.org> --- (In reply to Jakub Jelinek from comment #3) > Unless ARM has also conditional trap instruction that can trap if CC_V > CC_REGNUM, in that case just the first one should be renamed and > define_expand added which would behave similarly to subv<mode>4 except > instead of conditionally jumping to the last operand it would conditionally > trap. We don't have conditional trap instructions, but we do have a trap instruction pattern. We could do better than a libcall by open-coding a trap pattern as adds r0, r1, r2 bvs Ltrap ... Ltrap: <trap-bit-pattern> Though that risks common-code making it hard to identify which arithmetic instruction actually trapped. Slightly more expensive, but probably faster than a libcall would be to have a pattern that jumped over a trap instruction: adds r0, r1, r2 bvc LnotrapN <trap-bit-pattern> LnotrapN: ... which could be coded as a single pattern to limit the code-commoning.
