[Bug rtl-optimization/124572] [16 Regression] ICE at -O2/3 on aarch64 during RTL pass reload in rtl_verify_bb_layout, at cfgrtl.cc:3122

[pinskia at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=124572

Andrew Pinski <pinskia at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
           See Also|                            |https://gcc.gnu.org/bugzill
                   |                            |a/show_bug.cgi?id=120733

--- Comment #3 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
Note I don't it was caused by either PR 124439 nor PR 124041 (as it was
happening before r16-7890-g25996a53e81678); it is related to PR 124041 and PR
120733 as we inserting:
(insn 16 15 0 (set (reg:DI 0 x0 [108])
        (reg/f:DI 64 sfp)) -1
     (nil))


Which comes from:
(insn 12 2 13 2 (set (reg/i:SI 0 x0)
        (plus:SI (subreg:SI (reg/f:DI 64 sfp) 0)
            (const_int 3 [0x3]))) "/app/example.cpp":8:1 155 {*addsi3_aarch64}
     (nil))

as the subreg of sp in SI mode would be invalid.

I am suspecting r16-1565-g2dcc6dbd8a00ca or r16-1774-gda3f2a561649c7c489944 .