https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113856
--- Comment #5 from GCC Commits <cvs-commit at gcc dot gnu.org> --- The master branch has been updated by Naveen H.S <[email protected]>: https://gcc.gnu.org/g:b78a07c177fe268c00787e2e0859c95b2f42a7b9 commit r17-437-gb78a07c177fe268c00787e2e0859c95b2f42a7b9 Author: Naveen <[email protected]> Date: Sun May 10 22:45:41 2026 -0700 [PATCH] [Aarch64]: Use fmov for some low-lane FP SIMD constant vectors Extend AdvSIMD constant materialization to recognize vectors where only the low element is a representable floating-point constant and all other elements are zero. Bootstrapped and tested on aarch64-linux-gnu. PR target/113856 gcc/ChangeLog: * config/aarch64/aarch64-protos.h (aarch64_output_simd_mov_imm_low): New. (aarch64_const_vec_fmov_p): New. * config/aarch64/aarch64-simd.md (mov<mode>): Do not expand constant vectors handled by aarch64_const_vec_fmov_p into VDUP. (*aarch64_simd_mov<VDMOV:mode>): Add Dc alternatives for FMOV based SIMD constant moves. (*aarch64_simd_mov<VQMOV:mode>): Likewise. * config/aarch64/aarch64.cc (aarch64_const_vec_fmov_p): New function. (aarch64_output_simd_mov_imm_low): New function. * config/aarch64/constraints.md (Dc): New constraint. gcc/testsuite/ChangeLog: * gcc.target/aarch64/pr113856.c: New test. Signed-off-by: Naveen <[email protected]>
