[Bug rtl-optimization/125339] Volatile memory access sequences on aarch64/ARM64 may be compiled to post/pre increment instructions which do not affect ESR_EL{1,2,3}

[leon.a at serenityos dot org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=125339

--- Comment #4 from Leon Albrecht <leon.a at serenityos dot org> ---
This issue is now fixed on the llvm side of things
(the godbolt links need manual cache circumvention)