https://gcc.gnu.org/bugzilla/show_bug.cgi?id=125739
Richard Biener <rguenth at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
Status|ASSIGNED |NEW
Component|tree-optimization |rtl-optimization
CC| |law at gcc dot gnu.org,
| |rsandifo at gcc dot gnu.org
Assignee|rguenth at gcc dot gnu.org |unassigned at gcc dot
gnu.org
--- Comment #5 from Richard Biener <rguenth at gcc dot gnu.org> ---
Hmm, so the store on the backedge to the outer loop vanishes on the RTL side.
We allocate 'x' as DImode reg (huh!).
;; Generating RTL for gimple basic block 3
;; x.aa = 0.0;
(insn 13 12 14 (set (reg:SI 107)
(const_int 0 [0])) "t.c":22:12 -1
(nil))
(insn 14 13 15 (set (reg:DI 108)
(zero_extend:DI (reg:SI 107))) "t.c":22:12 -1
(nil))
(insn 15 14 16 (parallel [
(set (reg:DI 109)
(ashift:DI (reg:DI 108)
(const_int 32 [0x20])))
(clobber (reg:CC 17 flags))
]) "t.c":22:12 -1
(nil))
(insn 16 15 17 (set (reg:DI 110)
(zero_extend:DI (subreg:SI (reg/v:DI 105 [ x ]) 0))) "t.c":22:12 -1
(nil))
(insn 17 16 18 (parallel [
(set (reg:DI 111)
(ior:DI (reg:DI 110)
(reg:DI 109)))
(clobber (reg:CC 17 flags))
]) "t.c":22:12 -1
(nil))
(insn 18 17 0 (set (reg/v:DI 105 [ x ])
(reg:DI 111)) "t.c":22:12 -1
(nil))
which at some point is then
39: L39:
12: NOTE_INSN_BASIC_BLOCK 3
16: r105:DI=zero_extend(r105:DI#0)
5: r100:QI=0
19: L19:
20: NOTE_INSN_BASIC_BLOCK 4
21: r99:V2SF=r105:DI#0
REG_DEAD r105:DI
and ext-dce then does
Processing insn:
16: r105:DI=zero_extend(r105:DI#0)
Trying to simplify pattern:
(zero_extend:DI (subreg:SI (reg/v:DI 105 [ x ]) 0))
rescanning insn with uid = 16.
Successfully transformed to:
(reg/v:DI 105 [ x ])
and the 0.0 assign of x.aa is gone.
-fdisable-rtl-ext_dce fixes the bug.
