https://gcc.gnu.org/bugzilla/show_bug.cgi?id=125949

--- Comment #5 from Haochen Jiang <haochen.jiang at intel dot com> ---
I get the point, zen6 has xmm16+ support but no evex avxvnniint8 support, which
is in avx10.2/avx10_v1_aux.

However,... 

(In reply to vekumar from comment #4)
> Changing this pattern helps 
> --Snip--
> diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
> index 912fc1af018..9d334f9115f 100644
> --- a/gcc/config/i386/i386.md
> +++ b/gcc/config/i386/i386.md
> @@ -583,7 +583,7 @@
>                    
> sse_noavx,sse2,sse2_noavx,sse3,sse3_noavx,sse4,sse4_noavx,
>                    
> avx,noavx,avx2,noavx2,bmi,bmi2,fma4,fma,avx512f,noavx512f,
>                     avx512bw,noavx512bw,avx512dq,noavx512dq,fma_or_avx512vl,
> -                  
> avx512vl,noavx512vl,avxvnni,avx512vnnivl,avx512fp16,avxifma,
> +                  
> avx512vl,noavx512vl,avxvnni,avxvnniint8,avx512vnnivl,avx512fp16,avxifma,
>                     avx512ifmavl,avxneconvert,avx512bf16vl,vpclmulqdqvl,
>                    
> avx_noavx512f,avx_noavx512vl,vaes_avx512vl,noapx_nf,avx10_2"
>    (const_string "base"))
> @@ -967,6 +967,7 @@
>          (eq_attr "isa" "avx512vl") (symbol_ref "TARGET_AVX512VL")
>          (eq_attr "isa" "noavx512vl") (symbol_ref "!TARGET_AVX512VL")
>          (eq_attr "isa" "avxvnni") (symbol_ref "TARGET_AVXVNNI")
> +        (eq_attr "isa" "avxvnniint8") (symbol_ref "TARGET_AVXVNNIINT8")
>          (eq_attr "isa" "avx512vnnivl")
>            (symbol_ref "TARGET_AVX512VNNI && TARGET_AVX512VL")
>          (eq_attr "isa" "avx512fp16")
> diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
> index bb150f6b5f9..3ab607a1197 100644
> --- a/gcc/config/i386/sse.md
> +++ b/gcc/config/i386/sse.md
> @@ -32624,15 +32624,19 @@
>  })
> 
>  (define_insn "vpdp<vpdotprodtype>_<mode>"
> -  [(set (match_operand:VI4_AVX 0 "register_operand" "=v")
> +  [(set (match_operand:VI4_AVX 0 "register_operand" "=x,v")
>         (unspec:VI4_AVX
> -         [(match_operand:VI4_AVX 1 "register_operand" "0")
> -          (match_operand:VI4_AVX 2 "register_operand" "v")
> -          (match_operand:VI4_AVX 3 "nonimmediate_operand" "vm")]
> +         [(match_operand:VI4_AVX 1 "register_operand" "0,0")
> +          (match_operand:VI4_AVX 2 "register_operand" "x,v")
> +          (match_operand:VI4_AVX 3 "nonimmediate_operand" "xjm,vm")]
>           VPDOTPROD))]
>    "TARGET_AVXVNNIINT8 || TARGET_AVX10_2"
> -  "vpdp<vpdotprodtype>\t{%3, %2, %0|%0, %2, %3}"
> -   [(set_attr "prefix" "maybe_evex")])
> +  "@
> +   %{vex%} vpdp<vpdotprodtype>\t{%3, %2, %0|%0, %2, %3}
> +   vpdp<vpdotprodtype>\t{%3, %2, %0|%0, %2, %3}"
> +  [(set_attr "prefix" "vex,evex")
> +   (set_attr "addr" "gpr16,*")
> +   (set_attr "isa" "avxvnniint8,avx10_2")])
> 
>  (define_insn "vpdp<vpdotprodtype>_v16si"
>    [(set (match_operand:V16SI 0 "register_operand" "=v")
> --Snip-

... we should not introduce vex prefix here since this is redundant.

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