https://gcc.gnu.org/bugzilla/show_bug.cgi?id=126118
--- Comment #5 from Oleg Endo <olegendo at gcc dot gnu.org> ---
(In reply to Drea Pinski from comment #4)
> (In reply to Oleg Endo from comment #3)
> > (In reply to Drea Pinski from comment #2)
> > > (clobber:QI (const_int 0 [0]))
> > > Happens when creating the subreg:
> > > (subreg:QI (reg:SI 147 t) 0)
> > > fails.
> > >
> > >
> > > Which most likely points to r16-718-geb2ea476db2182 causing the
> > > difference.
> > > See PR 119966 also.
> >
> > Thanks for the pointer.
> >
> > Any suggestion how/what to adjust in the SH backend?
>
> It is about allowing different modes for the t register.
> I don't know if you want to allow QI/HI modes for the t register though
> since that requires maybe other changes to the backend.
>
>
> Something like this:
> diff --git a/gcc/config/sh/sh.cc b/gcc/config/sh/sh.cc
> index 09e4ff77c20..a3da90fa057 100644
> --- a/gcc/config/sh/sh.cc
> +++ b/gcc/config/sh/sh.cc
> @@ -10564,6 +10564,10 @@ sh_hard_regno_nregs (unsigned int regno,
> machine_mode mode)
> static bool
> sh_hard_regno_mode_ok (unsigned int regno, machine_mode mode)
> {
> +
> + if (regno == T_REG)
> + return mode == SImode || mode == QImode || mode == HImode;
> +
> if (SPECIAL_REGISTER_P (regno))
> return mode == SImode;
>
>
>
> But then you need to fix up some places where had `(subreg:QI (reg:SI T))`
> to instead use `(reg:QI T)`. I don't know if that is an acceptable change or
> an easy change to make though.
Funny. I ran into this already "a while ago".
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65151#c7
Didn't want to make that change because I've already "anticipated something"
back then. This time I've tried it out briefly and there are indeed some
regressions. But if that's a better way forward, perhaps I wouldn't mind.
It's just difficult to assess it, like you said.
