https://gcc.gnu.org/bugzilla/show_bug.cgi?id=126199
--- Comment #2 from Oleg Endo <olegendo at gcc dot gnu.org> --- (In reply to Richard Biener from comment #1) > There's also association coming into play. I wonder if it makes more sense > to keep the shift insns together (allow all constants) This is already being done (maybe not entirely consistently ...) because that's the only way to get anything meaningful out of combine. > and instead lower/split > them with a LCM algorithm that can maximize re-use and optimize code > placement (at the expense of register use - not sure how bad that is). Good point. Of course if register pressure is expected to be likely high in that spot, and the number of insns to recompute the value are likely going to be less than the spill code, then just re-compute the value. Not sure how well all of those things can be guessed in advance before RA, but should try something. Of course the better way would be to do an iterative RA instead of one-shot.
