[Bug target/104688] gcc and libatomic can use SSE for 128-bit atomic loads on Intel and AMD CPUs with AVX

[hjl.tools at gmail dot com via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=104688

H.J. Lu <hjl.tools at gmail dot com> changed:

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                 CC|                            |linkw at gcc dot gnu.org

--- Comment #41 from H.J. Lu <hjl.tools at gmail dot com> ---
>From Kewen Lin <linke...@hygon.cn>:

I just checked with the hardware team, it's confirmed that 128-bit aligned
load/store are atomic as well.