https://gcc.gnu.org/bugzilla/show_bug.cgi?id=126443
Bug ID: 126443
Summary: Wrong folding of vmaxnmv, vminmv and vpmaxnms and
vpminnms intrinsics
Product: gcc
Version: 16.0
Status: UNCONFIRMED
Keywords: wrong-code
Severity: normal
Priority: P3
Component: target
Assignee: unassigned at gcc dot gnu.org
Reporter: ktkachov at gcc dot gnu.org
Target Milestone: ---
Target: aarch64
These testcases abort at every level above -O0 and pass at -O0. They also pass
with Clang at all levels:
#include <arm_neon.h>
int
main (void)
{
/* FPMaxNum ignores the NaN lanes, so the result is 5.0. */
float32x4_t a = { __builtin_nanf (""), -3.0f, __builtin_nanf (""), 5.0f };
if (vmaxnmvq_f32 (a) != 5.0f)
__builtin_abort ();
/* FPMaxNum of +0.0 and -0.0 is +0.0. */
float32x4_t b = { -0.0f, 0.0f, -0.0f, -0.0f };
if (__builtin_signbit (vmaxnmvq_f32 (b)))
__builtin_abort ();
/* FPMinNum of -0.0 and +0.0 is -0.0. */
float64x2_t c = { -0.0, 0.0 };
if (!__builtin_signbit (vminnmvq_f64 (c)))
__builtin_abort ();
return 0;
}
#include <arm_neon.h>
int
main (void)
{
/* FPMaxNum ignores the NaN operand, so the result is 3.0. */
float b1[2] = { __builtin_nanf (""), 3.0f };
if (vpmaxnms_f32 (vld1_f32 (b1)) != 3.0f)
__builtin_abort ();
/* FPMaxNum of {-0.0, +0.0} is +0.0 and FPMinNum of it is -0.0. */
float b2[2] = { -0.0f, 0.0f };
if (__builtin_signbit (vpmaxnms_f32 (vld1_f32 (b2))))
__builtin_abort ();
if (!__builtin_signbit (vpminnms_f32 (vld1_f32 (b2))))
__builtin_abort ();
return 0;
}
Looks like our folding of these intrinsics ignores their NaN semantics
