https://gcc.gnu.org/bugzilla/show_bug.cgi?id=126552
--- Comment #8 from Bernie Innocenti <bernie at codewiz dot org> ---
To clarify the constraints we're working with, the repro code comes from the
expansion of type-generic macros like these:
#define LP7NR(offs, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, t5,
v5, r5, t6, v6, r6, t7, v7, r7, bt, bn) \
({ \
t1 _##name##_v1 = (v1); \
t2 _##name##_v2 = (v2); \
t3 _##name##_v3 = (v3); \
t4 _##name##_v4 = (v4); \
t5 _##name##_v5 = (v5); \
t6 _##name##_v6 = (v6); \
t7 _##name##_v7 = (v7); \
{ \
register int _d0 __asm("d0"); \
register int _d1 __asm("d1"); \
register int _a0 __asm("a0"); \
register int _a1 __asm("a1"); \
register t3 _n3 __asm(#r3) = _##name##_v3; \
register t4 _n4 __asm(#r4) = _##name##_v4; \
register t5 _n5 __asm(#r5) = _##name##_v5; \
register t6 _n6 __asm(#r6) = _##name##_v6; \
register t7 _n7 __asm(#r7) = _##name##_v7; \
register t1 _n1 __asm(#r1) = _##name##_v1; \
register t2 _n2 __asm(#r2) = _##name##_v2; \
register void *const _##name##_bn __asm("a6") = (bn); \
__asm volatile ("jsr a6@(-"#offs":W)" \
: "=r" (_d0), "=r" (_d1), "=r" (_a0), "=r" (_a1) \
: "r" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3), "rf"(_n4),
"rf"(_n5), "rf"(_n6), "rf"(_n7) \
: "fp0", "fp1", "cc", "memory"); \
} \
})
The full set is here:
https://github.com/adtools/fd2pragma/blob/master/Include/inline/macros.h
Following Drea's and Jakub's recommendation, I experimented with using hard
register constraints on __GNUC__ >= 16:
https://github.com/codewiz/sfdc/blob/inline-macros-amigaports/include/inline/macros.h
This works only for GCC 16 (*), and only with -mlra (and there might be good
reasons if it's not already the default on m68k).
Plus, we still need a solution for GCC 13 and GCC 15, which are still actively
used by Amiga projects.
