https://gcc.gnu.org/bugzilla/show_bug.cgi?id=126640
--- Comment #1 from Kito Cheng <kito at gcc dot gnu.org> --- We recently discussed a similar issue internally, and it was also related to misaligned accesses. Let me describe how LLVM handles this: `-mcpu` consists of CPU features, a pipeline model, and tuning features, while `-mtune` consists only of a pipeline model and tuning features. CPU features include the architecture string and support for misaligned scalar or vector accesses. These features affect whether the generated code can execute correctly. Tuning features include things such as the cost model and macro fusion. When a core supported by `-mcpu` is used with `-mtune`, only its pipeline model and tuning features are applied. For example, `sifive-p450` is a valid `-mcpu` option (e.g. `-mcpu=sifive-p450`), and it can also be used as `-mtune=sifive-p450`. ref: https://github.com/llvm/llvm-project/blob/main/llvm/lib/Target/RISCV/RISCVProcessors.td#L461-L488 ``` def SIFIVE_P450 : RISCVProcessorModel< "sifive-p450", # Name SiFiveP400Model, # pipeline model [Feature64Bit, FeatureStdExtI, FeatureStdExtM, ... FeatureStdExtZihintntl, # ISA strings FeatureUnalignedScalarMem, # misaligned accesses FeatureUnalignedVectorMem], SiFiveP400TuneFeatures>; # macro fusion and some other code gen quirk won't cause fault. ``` --- Back to GCC: currently, misaligned access support, the cost model, and other tuning features and options are all stored in `riscv_tune_param`. Perhaps we could consider adopting the same behavior as LLVM by separating misaligned access support from the tuning parameters. We could also leave some room for future extensions to add similar `feature` fields.
