[Bug target/126873] New: RISC-V rv64gcv: wrong code at -O1

[xxs_chy at outlook dot com via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=126873

            Bug ID: 126873
           Summary: RISC-V rv64gcv: wrong code at -O1
           Product: gcc
           Version: 17.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: target
          Assignee: unassigned at gcc dot gnu.org
          Reporter: xxs_chy at outlook dot com
  Target Milestone: ---

Reduced case:
#include <stdint.h>
#include <stdlib.h>
typedef uint16_t v2u16 __attribute__((vector_size(4)));
void f28(uint64_t a3)
{
    uint64_t v15 =
        __builtin_bswap64((int64_t)10398105857157080808ull / (int64_t)a3);
    v2u16 bc13 = (v2u16){ 29637 };
    if (0 >= bc13[(uint32_t)v15]) abort();
}
int main() { f28(17752357569705450221ull); }

This case aborts with -O1, and terminates normally with -O0.

gcc version 17.0.0 20260813 (experimental) (GCC)
qemu-riscv64 version 11.0.2