https://gcc.gnu.org/bugzilla/show_bug.cgi?id=126933
--- Comment #3 from H.J. Lu <hjl.tools at gmail dot com> ---
i386.md has
/* vcvtneps2bf16 doesn't honor SNAN, and turn sNAN into qNAN quietly,
and it always round to even.
flag_unsafe_math_optimization is needed for psrld.
If we don't expect qNaNs nor sNaNs and can assume rounding
to nearest, we can expand the conversion inline as
(fromi + 0x7fff + ((fromi >> 16) & 1)) >> 16. */
(define_insn "truncsfbf2"
[(set (match_operand:BF 0 "register_operand" "=x,x,v,Yv")
(float_truncate:BF
(match_operand:SF 1 "register_operand" "0,x,v,Yv")))]
"TARGET_SSE2 && !HONOR_NANS (BFmode) && !flag_rounding_math
&& (flag_unsafe_math_optimizations
|| TARGET_AVXNECONVERT
|| (TARGET_AVX512BF16 && TARGET_AVX512VL))"
"@
psrld\t{$16, %0|%0, 16}
%{vex%} vcvtneps2bf16\t{%1, %0|%0, %1}
vcvtneps2bf16\t{%1, %0|%0, %1}
vpsrld\t{$16, %1, %0|%0, %1, 16}"
[(set_attr "isa" "noavx,avxneconvert,avx512bf16vl,avx")
(set_attr "prefix" "orig,vex,evex,vex")
(set_attr "type" "sseishft1,ssecvt,ssecvt,sseishft1")])
But it doesn't implement
(fromi + 0x7fff + ((fromi >> 16) & 1)) >> 16
when TARGET_AVXNECONVERT and TARGET_AVX512BF16 aren't enabled.
