https://gcc.gnu.org/bugzilla/show_bug.cgi?id=127056
--- Comment #4 from GCC Commits <cvs-commit at gcc dot gnu.org> --- The master branch has been updated by Kyrylo Tkachov <[email protected]>: https://gcc.gnu.org/g:9394c71d36980a0abf1502be26608d6055893ed6 commit r17-3655-g9394c71d36980a0abf1502be26608d6055893ed6 Author: Kyrylo Tkachov <[email protected]> Date: Tue Aug 25 13:31:47 2026 +0200 lra: Canonicalize whole-address reloads [PR127056] Combine can form a prefetch address that contains a power-of-two MULT. This is valid in an address context. The AArch64 predicate accepts it during non-strict recognition. Strict checking can then require LRA to move the complete address to a register. The reload_inner_addr path passed the address directly to lra_emit_move. This moved the address-canonical MULT into a normal SET: (set (reg:DI 115) (and:DI (mult:DI (subreg:DI ...) (const_int 8)) (const_int 34359738360))) Outside an address, ASHIFT is the canonical form. The generated SET did not match an instruction and LRA failed in lra_set_insn_recog_data. Call the existing canonicalize_reload_addr helper before the move. It changes the relevant part of the source to: (ashift:DI (subreg:DI ...) (const_int 3)) The existing add pattern then recognizes the complete address reload. Add a test for signed and unsigned scaled prefetch indices. Bootstrapped and regression tested on aarch64-unknown-linux-gnu. gcc/ChangeLog: PR rtl-optimization/127056 * lra-constraints.cc (process_address_1): Canonicalize a complete address reload. gcc/testsuite/ChangeLog: PR rtl-optimization/127056 * gcc.target/aarch64/pr127056.c: New test. Signed-off-by: Kyrylo Tkachov <[email protected]>
