https://gcc.gnu.org/bugzilla/show_bug.cgi?id=127156
--- Comment #1 from Jeevitha <jeevitha at gcc dot gnu.org> ---
vec_genbm:
Purpose: Create an element byte mask from a 16-bit bit mask.
Result value:For each integer i from 0 to 15, do the following. Counting the
leftmost element of r as the 0th element, and the rightmost element as the 15th
element, all bits of the ith element of r are set to 0 if the ith bit of the
16-bit value in a is equal to 0. All bits of the ith element of r are set to 1
if the
ith bit of the 16-bit value in a is equal to 1. The bits in a are likewise
numbered from left to right.
The instruction generated for vec_genbm is mtvsrbm VRT,RB.
do i = 0 to 15
if GPR[RB].bit[48+i] = 0 then
VSR[VRT+32].byte[i] ← 0x00
else
VSR[VRT+32].byte[i] ← 0xFF
end
For this testcase:
vbc_result_bi = vec_genbm(5);
Instruction generated: mtvsrbm v0,rX
Here, 5 is:
0x0005 = 0000 0000 0000 0101
Since the bits are numbered from left to right, bits 13 and 15 are set.
element: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
value: 00 00 00 00 00 00 00 00 00 00 00 00 00 FF 00 FF
---------------------------------------------------------------------------------
On LE:
(gdb) p $v0
$3 = {uint128 = 16711935, v4_float = {2.34184089e-38, 0, 0, 0}, v4_int32 = {
16711935, 0, 0, 0}, v8_int16 = {255, 255, 0, 0, 0, 0, 0, 0}, v16_int8 = {
-1, 0, -1, 0 <repeats 13 times>}}
v16_int8 shows
element: 0 1 2 3 ... 15
value: 0xff 0x00 0xff 0x00 ... 0x00
---------------------------------------------------------------------------------
On BE:
(gdb) p $v0
$4 = {uint128 = 16711935, v4_float = {0, 0, 0, 2.34184089e-38}, v4_int32 = {
0, 0, 0, 16711935}, v8_int16 = {0, 0, 0, 0, 0, 0, 255, 255}, v16_int8 = {
0 <repeats 13 times>, -1, 0, -1}}
Here, the v16_int8 view appears as:
element: 0 ... 12 13 14 15
value: 0 ... 00 0xff 0x00 0xff
---------------------------------------------------------------------------------
Thus, vec_genbm(5) generates the same logical byte mask on both LE and BE. The
apparent difference in v16_int8 ordering is due to the different LE/BE register
representation. Therefore, the BE and LE outputs vary in the testcase, and the
testcase fails on BE.
