https://gcc.gnu.org/bugzilla/show_bug.cgi?id=126671
--- Comment #3 from GCC Commits <cvs-commit at gcc dot gnu.org> --- The master branch has been updated by Jakub Jelinek <[email protected]>: https://gcc.gnu.org/g:af981ba6b6dfb1a7e15e4472318535ab7d866893 commit r17-3934-gaf981ba6b6dfb1a7e15e4472318535ab7d866893 Author: Jakub Jelinek <[email protected]> Date: Fri Sep 4 19:46:19 2026 +0200 RISC-V: Improve __builtin_bitreverse{8,16,32,64} code generation [PR126671] The following patch attempts to improve code generation for __builtin_bitreverse{8,16,32,64} when ZBKB extension is enabled, by using brev8 a0,a0 or rev8 a0,a0 brev8 t0,a0 srli a0,t0,48 ! 16 for rv32 or (bitreversesi2 if rv64) rev8 a0,a0 brev8 t0,a0 srai a0,t0,32 or (bitreversesi2 if rv32 or bitreversedi2 if rv64) rev8 a0,a0 brev8 a0,a0 Only tested in a cross on a testcase with the 4 builtins, hope CI will pick this up when posted with RISC-V in the subject. The bswaphi2 change is not strictly necessary, just weird to limit it only to TARGET_ZBB when bswap<word_mode>2 is also TARGET_ZBKB. 2026-09-04 Jakub Jelinek <[email protected]> PR target/126671 * config/riscv/bitmanip.md (bswaphi2): Use TARGET_ZBB || TARGET_ZBKB condition instead of just TARGET_ZBB. (bitreverse<mode>2): New expander. * gcc.target/riscv/bitreverse-1-zbkb.c: New test. * gcc.target/riscv/bitreverse-2-zbkb.c: New test. * gcc.target/riscv/bitreverse-3-zbkb.c: New test. Reviewed-by: Jeff Law <[email protected]>
