https://gcc.gnu.org/bugzilla/show_bug.cgi?id=127381
Drea Pinski <pinskia at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
Keywords| |easyhack
Last reconfirmed| |2026-09-19
Ever confirmed|0 |1
Status|UNCONFIRMED |NEW
--- Comment #1 from Drea Pinski <pinskia at gcc dot gnu.org> ---
bit_5 = x_4(D) >> 31;
_1 = bit_5 == { 1, 1, 1, 1, 1, 1, 1, 1 };
_3 = VEC_COND_EXPR <_1, { 1, 1, 1, 1, 1, 1, 1, 1 }, { 0, 0, 0, 0, 0, 0, 0, 0
}>;
So we need a pattern which matches:
(vec_cond (eq (rshift @0 INTEGER_CST@1) uniform_integer_cst@2)
uniform_integer_cst@3 integer_zerop)
And makes sure @1 is `precision-1` and the types of @0 and @1 match or nop
conversions and that the type of @0 is an unsigned type. and @2 is {1...} and
@3 is {1..}.
For signed types of @0, @1 is `precision-1` and the types of @0 and @1 match or
nop conversions, @2 and @3 are -1.
if we have signed @0 and 1 for @3, then we either need to use unsigned shift
(if it exists) or &1 (if it exists).
if we have unsigned @0 and -1 for @3, then we need to use signed shift (if it
exists) or negate (if it exists).
