https://gcc.gnu.org/bugzilla/show_bug.cgi?id=127326

--- Comment #9 from Uroš Bizjak <ubizjak at gmail dot com> ---
Whent asm constraint in the testcase is changed to "+rm":

        movl    48(%esp), %eax
        movl    $10, (%esp)
        movl    $0, 4(%esp)
        movl    $0, 8(%esp)
        movl    $809369600, 12(%esp)
   <--- **asm is here**
        movl    (%esp), %esi
        movl    4(%esp), %ebx
        movl    $10, 16(%esp)  <-- dead store
        movl    8(%esp), %ecx
        movl    12(%esp), %edx
        movl    $0, 20(%esp)  <-- dead store
        movl    %esi, (%eax)
        movl    %ebx, 4(%eax)
        movl    %ecx, 8(%eax)
        movl    %edx, 12(%eax)
        movl    $0, 24(%esp)  <-- dead store
        movl    $809369600, 28(%esp)  <-- dead store

where .reload pass creates:

   11: [sp:SI+0x10]=0xa
   12: [sp:SI+0x14]=0
   13: [sp:SI+0x18]=0
   14: [sp:SI+0x1c]=0x303e0000  <--- the constant is already on stack
   36: dx:SI=[sp:SI+0x10]
   30: [sp:SI]=dx:SI
   37: cx:SI=[sp:SI+0x14]
   31: [sp:SI+0x4]=cx:SI
   38: bx:SI=[sp:SI+0x18]
   32: [sp:SI+0x8]=bx:SI
   39: si:SI=[sp:SI+0x1c]
   33: [sp:SI+0xc]=si:SI        <--- another copy of the constant on stack
   16: {[sp:SI]=asm_operands;clobber flags:CC;}
    6: si:SI=[sp:SI]
    7: bx:SI=[sp:SI+0x4]
    8: cx:SI=[sp:SI+0x8]
    9: dx:SI=[sp:SI+0xc]
   17: [ax:SI]=si:SI
   18: [ax:SI+0x4]=bx:SI
   19: [ax:SI+0x8]=cx:SI
   20: [ax:SI+0xc]=dx:SI

and finally, when the constraint is changed to "+m", we get optimal assembly:

        movl    32(%esp), %eax
        movl    $10, (%esp)
        movl    $0, 4(%esp)
        movl    $0, 8(%esp)
        movl    $809369600, 12(%esp)
   <--- **asm is here**
        movl    (%esp), %edx
        movl    %edx, (%eax)
        movl    4(%esp), %edx
        movl    %edx, 4(%eax)
        movl    8(%esp), %edx
        movl    %edx, 8(%eax)
        movl    12(%esp), %edx
        movl    %edx, 12(%eax)

where .reload pass creates:

    6: [sp:SI]=0xa
    7: [sp:SI+0x4]=0
    8: [sp:SI+0x8]=0
    9: [sp:SI+0xc]=0x303e0000
   10: {[sp:SI]=asm_operands;clobber flags:CC;}
   11: dx:SI=[sp:SI]
      REG_EQUIV [frame:SI-0x10]
   12: [ax:SI]=dx:SI
   13: dx:SI=[sp:SI+0x4]
      REG_EQUIV [frame:SI-0xc]
   14: [ax:SI+0x4]=dx:SI
   15: dx:SI=[sp:SI+0x8]
      REG_EQUIV [frame:SI-0x8]
   16: [ax:SI+0x8]=dx:SI
   17: dx:SI=[sp:SI+0xc]
      REG_EQUIV [frame:SI-0x4]
   18: [ax:SI+0xc]=dx:SI

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