https://gcc.gnu.org/bugzilla/show_bug.cgi?id=127597
Bug ID: 127597
Summary: -mvector-strict-align flag does not work as expected
Product: gcc
Version: 16.1.0
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component: c
Assignee: unassigned at gcc dot gnu.org
Reporter: blank9.page at gmail dot com
Target Milestone: ---
Hi,
The cross-compiler was used to port OpenSSL to RISC-V. When running tests on
the target machine, one of the tests failed with a SIGBUS error. The attached
file reproduces this pattern.
Target machine: Banana Pi BPI-F3 RISC-V
Compile command: riscv64-unknown-linux-gnu-gcc \
-O3 -g \
-mvector-strict-align \
repro-run.c \
-o repro-run
riscv64-unknown-linux-gnu-gcc -v:
Using built-in specs.
COLLECT_GCC=riscv64-unknown-linux-gnu-gcc
COLLECT_LTO_WRAPPER=/home/user/x-tools/riscv64-unknown-linux-gnu/libexec/gcc/riscv64-unknown-linux-gnu/16.1.0/lto-wrapper
Target: riscv64-unknown-linux-gnu
Configured with:
/home/user/crosstool-ng/.build/riscv64-unknown-linux-gnu/src/gcc/configure
--build=x86_64-build_pc-linux-gnu --host=x86_64-build_pc-linux-gnu
--target=riscv64-unknown-linux-gnu
--prefix=/home/user/x-tools/riscv64-unknown-linux-gnu
--exec_prefix=/home/user/x-tools/riscv64-unknown-linux-gnu
--with-sysroot=/home/user/x-tools/riscv64-unknown-linux-gnu/riscv64-unknown-linux-gnu/sysroot
--enable-languages=c,c++
--with-arch=rv64imafdcv_zicbom_zicboz_zicntr_zicond_zicsr_zifencei_zihintpause_zihpm_zfh_zfhmin_zca_zcd_zba_zbb_zbc_zbs_zkt_zve32f_zve32x_zve64d_zve64f_zve64x_zvfh_zvfhmin_zvkt_sscofpmf_sstc_svinval_svnapot_svpbmt
--with-pkgversion='crosstool-NG 1.28.0.58_27cd838' --enable-__cxa_atexit
--disable-libmudflap --disable-libgomp --disable-libssp --disable-libquadmath
--disable-libquadmath-support --disable-libsanitizer --disable-libmpx
--with-gmp=/home/user/crosstool-ng/.build/riscv64-unknown-linux-gnu/buildtools
--with-mpfr=/home/user/crosstool-ng/.build/riscv64-unknown-linux-gnu/buildtools
--with-mpc=/home/user/crosstool-ng/.build/riscv64-unknown-linux-gnu/buildtools
--with-isl=/home/user/crosstool-ng/.build/riscv64-unknown-linux-gnu/buildtools
--enable-lto --enable-threads=posix --enable-target-optspace --disable-plugin
--disable-nls --disable-multilib
--with-local-prefix=/home/user/x-tools/riscv64-unknown-linux-gnu/riscv64-unknown-linux-gnu/sysroot
--enable-long-long
Thread model: posix
Supported LTO compression algorithms: zlib zstd
gcc version 16.1.0 (crosstool-NG 1.28.0.58_27cd838)
The problem is that the compiler generates these vector load instructions even
though the flag forbids it. Look at repro_xor() function: argument
in+len-SIV_LEN may be unaligned, so the we first copy the content to 100%
aligned buffer, and only then perform xor operation. The problem is that the
compiler "optimizes" away this aligned buffer, effectively generating unaligned
vector load instructions ignoring -mvector-strict-align option. In the
assembler code, instruction .LM7 loads data to vector from a0, that contains
unaligned address.
repro_xor:
.LM5:
vsetivli zero,2,e64,m1,ta,ma
.LM6:
add a0,a0,a1
.LVL2:
.LM7:
vle64.v v2,0(a0)
.LM8:
vle64.v v1,0(a2)
.LM9:
addi sp,sp,-16
