https://gcc.gnu.org/bugzilla/show_bug.cgi?id=127883
--- Comment #5 from GCC Commits <cvs-commit at gcc dot gnu.org> --- The master branch has been updated by Uros Bizjak <[email protected]>: https://gcc.gnu.org/g:70e0da089fe77227c7b9e257030e0d9674e7551a commit r17-5212-g70e0da089fe77227c7b9e257030e0d9674e7551a Author: Uros Bizjak <[email protected]> Date: Wed Oct 14 13:16:12 2026 +0200 i386: Add *extzvdi_shr to implement zero_extract with 32-bit shift [PR127883] Extracting the top bits of the low 32 bits of a DImode value, e.g. (x >> 24) & 0xff where pos + len == 32, can be done with a single 32-bit logical right shift. SImode shifts implicitly zero-extend the result to 64 bits on x86-64, so no separate masking or zero-extension is needed. Add a pre-reload define_insn_and_split that matches such a zero_extract with pos in the 1..31 range and splits it to a zero-extended SImode lshiftrt of the lowpart of the source. A pos of 0 is excluded, since the extraction is then just a zero-extension. PR target/127883 gcc/ChangeLog: * config/i386/i386.md (*extzvdi_shr): New define_insn_and_split pattern. gcc/testsuite/ChangeLog: * gcc.target/i386/pr127883-1.c: New test. * gcc.target/i386/pr127883-2.c: Ditto.
