https://gcc.gnu.org/bugzilla/show_bug.cgi?id=127900
--- Comment #6 from vekumar at gcc dot gnu.org ---
(In reply to Uroš Bizjak from comment #5)
> Created attachment 65852 [details]
> Patch that improves umul<mode>3_highpart
>
> Prototype patch that improves umul<mode>3_highpart:
--snip--
+
;; BMI2 MULX highpart-only pattern. Uses MULX to get only the high part.
;; When both output operands are identical, MULX writes the high half to that
;; register, so no scratch register is needed. This avoids the mov from rdx
@@ -11956,7 +11958,7 @@ (define_peephole2
(define_insn "*bmi2_umul<mode>3_highpart"
[(set (match_operand:DWIH 0 "register_operand" "=r")
(umul_highpart:DWIH
- (match_operand:DWIH 1 "register_operand" "d")
+ (match_operand:DWIH 1 "register_operand" "%d")
(match_operand:DWIH 2 "nonimmediate_operand" "rm")))]
"TARGET_BMI2"
"mulx\t{%2, %0, %0|%0, %0, %2}"
@@ -11964,16 +11966,45 @@ (define_insn "*bmi2_umul<mode>3_highpart"
(set_attr "prefix" "vex")
(set_attr "mode" "<MODE>")])
--snip--
Do we need to specify %d Change here??
Otherwise the patch is same as I wrote.
>
> mulh:
> movq %rdi, %rdx
> mulx %rsi, %rax, %rax
> ret
>
> Other _higpart patterns should be handled in a similar
Shall I test and post this patch on your behalf? This is coming from
sealcrypto benchmark I will also check mulx is properly generated there as
well.
