https://gcc.gnu.org/bugzilla/show_bug.cgi?id=128130
Bug ID: 128130
Summary: [17 Regression] arm Cortex-M: adjacent word loads are
no longer paired into ldrd at -O2
Product: gcc
Version: 17.0
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component: tree-optimization
Assignee: unassigned at gcc dot gnu.org
Reporter: yuki.tanaka at defaultcase dot de
Target Milestone: ---
int a(int *p)
{
return p[0] + p[1] + p[2] + p[3];
}
Compiler Explorer (GCC 16.1 vs. 17):
With -O2 -mcpu=cortex-m33 -mfloat-abi=soft.
ARM GCC 16.1:
a:
ldrd r3, r1, [r0]
add r3, r3, r1
ldrd r2, r0, [r0, #8]
add r3, r3, r2
add r0, r0, r3
bx lr
ARM GCC 17:
a:
ldr r1, [r0, #4]
ldr r2, [r0]
ldrd ip, r3, [r0, #8]
add r0, r2, ip
add r3, r3, r1
add r0, r0, r3
bx lr
GCC 17 adds p[0] + p[2] and p[1] + p[3] instead of p[0] + p[1] and p[2] + p[3],
so the loads are no longer paired. -fno-tree-slp-vectorize gives the GCC 16.1
code.
Possibly related to r17-2654-gfb0838bc107 ("Support two-lane vector BB
reductions without target support").