https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110183
Stefan Schulze Frielinghaus <stefansf at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
Resolution|--- |FIXED
CC| |stefansf at gcc dot gnu.org
Status|UNCONFIRMED |RESOLVED
--- Comment #1 from Stefan Schulze Frielinghaus <stefansf at gcc dot gnu.org>
---
Bisect turned into a treasure hunt. First bisect stopped at
r14-4621-g24eaada73def58 which just changes the test. Using the old test the
next bisect stopped at r15-787-g57e04879389f9c which just changes some LOAD ON
CONDITION metrics. Reverting this change the final bisect stopped at
r15-3602-g9ebc9fbdddfe1e which is the real deal. Without this commit the mode
of a pseudo is changed:
(insn 24 23 0 (set (strict_low_part (subreg:SI (reg:DI 73) 4))
(subreg:SI (reg/f:DI 79) 4)) "pr106101.c":43:23 discrim 1 -1
(nil))
...
(insn 37 36 0 (set (mem:SI (const_int 4 [0x4]) [1 MEM[(int *)0B + 4B]+0 S4
A32])
(reg/v:SI 73 [ yyval ])) "pr106101.c":53:12 -1
(nil))
Here we are referring to pseudo 73 in two different modes which is wrong.
Later on during web we then end up with a wrong insn
(insn 37 36 38 7 (set (mem:SI (const_int 4 [0x4]) [1 MEM[(int *)0B + 4B]+0 S4
A32])
(reg/f:DI 73 [ *_5 ])) "pr106101.c":53:12 1509 {*movsi_zarch}
(expr_list:REG_DEAD (reg/v:SI 73 [ yyval ])
(nil)))
for which we eventually ICE. Fixed in r15-3602-g9ebc9fbdddfe1e.
