https://gcc.gnu.org/bugzilla/show_bug.cgi?id=128184
Bug ID: 128184
Summary: wrong code with __sync_fetch_and_nand on _BitInt on
riscv64
Product: gcc
Version: 17.0
Status: UNCONFIRMED
Keywords: wrong-code
Severity: normal
Priority: P3
Component: target
Assignee: unassigned at gcc dot gnu.org
Reporter: zsojka at seznam dot cz
Target Milestone: ---
Host: x86_64-pc-linux-gnu
Target: riscv64-unknown-linux-gnu
Created attachment 65972
--> https://gcc.gnu.org/bugzilla/attachment.cgi?id=65972&action=edit
reduced testcase
Output:
$ riscv64-unknown-linux-gnu-gcc testcase.c -static
$ qemu-riscv64 -- ./a.out
qemu: uncaught target signal 6 (Aborted) - core dumped
Aborted qemu-riscv64 -- ./a.out
The generated ASM:
.L3:
ld a5,-40(s0)
not a5,a5
andi a5,a5,5
does the "wrong" pre-4.4 nand operation in this case.
I haven't investigated if this is a target issue, or if the issue is in a more
generic code.
$ riscv64-unknown-linux-gnu-gcc -v
Using built-in specs.
COLLECT_GCC=/repo/gcc-trunk/binary-latest-riscv64//bin/riscv64-unknown-linux-gnu-gcc
COLLECT_LTO_WRAPPER=/repo/gcc-trunk/binary-trunk-20261026134324-r17-5578-gd47f2b280cb4aa-checking-yes-rtl-df-extra-riscv64/bin/../libexec/gcc/riscv64-unknown-linux-gnu/17.0.0/lto-wrapper
Target: riscv64-unknown-linux-gnu
Configured with: /repo/gcc-trunk//configure --enable-languages=c,c++
--enable-valgrind-annotations --disable-nls --enable-checking=yes,rtl,df,extra
--with-isa-spec=2.2 --with-sysroot=/usr/riscv64-unknown-linux-gnu
--build=x86_64-pc-linux-gnu --host=x86_64-pc-linux-gnu
--target=riscv64-unknown-linux-gnu
--with-ld=/usr/bin/riscv64-unknown-linux-gnu-ld
--with-as=/usr/bin/riscv64-unknown-linux-gnu-as --disable-multilib
--enable-libsanitizer --disable-libstdcxx-pch
--prefix=/repo/gcc-trunk//binary-trunk-20261026134324-r17-5578-gd47f2b280cb4aa-checking-yes-rtl-df-extra-riscv64
Thread model: posix
Supported LTO compression algorithms: zlib zstd
gcc version 17.0.0 20261026 (experimental) (GCC)
