[Bug target/127459] [14/15/16/17 Regression] x86: AVX512VL instruction (vinserti32x4, EVEX.256) emitted with only -mavx512f

[cvs-commit at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=127459

--- Comment #7 from GCC Commits <cvs-commit at gcc dot gnu.org> ---
The releases/gcc-14 branch has been updated by Haochen Jiang
<jian...@gcc.gnu.org>:

https://gcc.gnu.org/g:9acd4fe89ff86f79a223e7c7e30be165fa86dcbb

commit r14-12977-g9acd4fe89ff86f79a223e7c7e30be165fa86dcbb
Author: Haochen Jiang <haochen.ji...@intel.com>
Date:   Mon Oct 26 14:08:09 2026 +0800

    i386: Do not emit 256 bit vinsert*64x2/32*4 w/o AVX512VL [PR127459]

    avx_vec_concat<mode> wrongly emits 256 bit vinsert instructions when
    there is no AVX512VL after egpr change. Change noavx512f to noavx512vl
    for 256 bit vector to prohibit that.

    gcc/ChangeLog:

            PR target/127459
            * config/i386/sse.md (avx_vec_concat_isa): New.
            (avx_vec_concat<mode>): Allow 256 bit vinsert*64x2/32*4 when
            AVX512VL is enabled.

    gcc/testsuite/ChangeLog:

            PR target/127459
            * gcc.target/i386/pr127459-1a.c: New test.
            * gcc.target/i386/pr127459-1b.c: Ditto.