[Bug target/128358] New: Use the integer register to form some 64bit vectors

[pinskia at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=128358

            Bug ID: 128358
           Summary: Use the integer register to form some 64bit vectors
           Product: gcc
           Version: 17.0
            Status: UNCONFIRMED
          Keywords: missed-optimization
          Severity: normal
          Priority: P3
         Component: target
          Assignee: unassigned at gcc dot gnu.org
          Reporter: pinskia at gcc dot gnu.org
  Target Milestone: ---
            Target: aarch64

Take:
```
#define vector __attribute__((vector_size(8)))

vector int f(void)
{
  return (vector int){0,1};
}
```

Currently GCC loads from the constant pool but instead it could use the GPRs to
form the constant and then move it to the simd register.
LLVM started to do this in LLVM 23.