[Bug rtl-optimization/128448] New: RTL if-converter can produce a better select between x and -1 for RISC-V and perhaps other targets

[law at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=128448

            Bug ID: 128448
           Summary: RTL if-converter can produce a better select between x
                    and -1 for RISC-V and perhaps other targets
           Product: gcc
           Version: 17.0
            Status: UNCONFIRMED
          Keywords: missed-optimization
          Severity: normal
          Priority: P3
         Component: rtl-optimization
          Assignee: unassigned at gcc dot gnu.org
          Reporter: law at gcc dot gnu.org
            Blocks: 26163
  Target Milestone: ---
            Target: riscv

Another case from x264.

-O2 -march=rv64gc_zicond:

long
f (int c)
{
  return c ? -1 : 0x0202020202020202L;
}

Currently generates something like this:
li        a4,33685504
addi      t0,a4,514
slli      a5,t0,32
add       t1,a5,t0
li        t2,-1
czero.nez a1,t1,a0
czero.eqz a0,t2,a0
add       a0,a0,a1

We can do slightly better with this:
li        a4,33685504
addi      t0,a4,514
slli      a5,t0,32
add       t1,a5,t0
czero.nez s6,s7,a2
snez      t1,a2
sub       t5,s6,t1

Probably 1c faster and likely encodes better.  It's only ~3.5M instructions, so
small.  Given it's a 4->3 combination, it's probably better done in ifcvt.cc or
perhaps up in gimple.


Referenced Bugs:

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=26163
[Bug 26163] [meta-bug] missed optimization in SPEC (2026, 2k17, 2k and 2k6 and
95)