https://gcc.gnu.org/g:8bdf10fc2e9ac16a296f76a442c068216469b3a3

commit r15-7174-g8bdf10fc2e9ac16a296f76a442c068216469b3a3
Author: Saurabh Jha <saurabh....@arm.com>
Date:   Tue Jan 21 15:59:39 2025 +0000

    Fix command flags for SVE2 faminmax
    
    Earlier, we were gating SVE2 faminmax behind sve+faminmax. This was
    incorrect and this patch changes it so that it is gated behind
    sve2+faminmax.
    
    gcc/ChangeLog:
    
            * config/aarch64/aarch64-sve2.md:
            (*aarch64_pred_faminmax_fused): Fix to use the correct flags.
            * config/aarch64/aarch64.h
            (TARGET_SVE_FAMINMAX): Remove.
            * config/aarch64/iterators.md: Fix iterators so that famax and
            famin use correct flags.
    
    gcc/testsuite/ChangeLog:
    
            * gcc.target/aarch64/sve/faminmax_1.c: Fix test to use the
            correct flags.
            * gcc.target/aarch64/sve/faminmax_2.c: Fix test to use the
            correct flags.
            * gcc.target/aarch64/sve/faminmax_3.c: New test.

Diff:
---
 gcc/config/aarch64/aarch64-sve2.md                |  2 +-
 gcc/config/aarch64/aarch64.h                      |  1 -
 gcc/config/aarch64/iterators.md                   |  8 ++++----
 gcc/testsuite/gcc.target/aarch64/sve/faminmax_1.c |  2 +-
 gcc/testsuite/gcc.target/aarch64/sve/faminmax_2.c |  2 +-
 gcc/testsuite/gcc.target/aarch64/sve/faminmax_3.c | 11 +++++++++++
 6 files changed, 18 insertions(+), 8 deletions(-)

diff --git a/gcc/config/aarch64/aarch64-sve2.md 
b/gcc/config/aarch64/aarch64-sve2.md
index 60bc03b2650c..3e08e092cd04 100644
--- a/gcc/config/aarch64/aarch64-sve2.md
+++ b/gcc/config/aarch64/aarch64-sve2.md
@@ -2950,7 +2950,7 @@
              (match_operand:SVE_FULL_F 3 "register_operand")]
             UNSPEC_COND_FABS)]
          SVE_COND_SMAXMIN))]
-  "TARGET_SVE_FAMINMAX"
+  "TARGET_FAMINMAX && TARGET_SVE2_OR_SME2"
   {@ [ cons: =0 , 1   , 2  , 3 ; attrs: movprfx ]
      [ w        , Upl , %0 , w ; *              ] 
<faminmax_cond_uns_op>\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.<Vetype>
      [ ?&w      , Upl , w  , w ; yes            ] movprfx\t%0, 
%2\;<faminmax_cond_uns_op>\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.<Vetype>
diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h
index 5cbf442130bc..1a19b27fd934 100644
--- a/gcc/config/aarch64/aarch64.h
+++ b/gcc/config/aarch64/aarch64.h
@@ -472,7 +472,6 @@ constexpr auto AARCH64_FL_DEFAULT_ISA_MODE ATTRIBUTE_UNUSED
 /* Floating Point Absolute Maximum/Minimum extension instructions are
    enabled through +faminmax.  */
 #define TARGET_FAMINMAX AARCH64_HAVE_ISA (FAMINMAX)
-#define TARGET_SVE_FAMINMAX (TARGET_SVE && TARGET_FAMINMAX)
 
 /* Lookup table (LUTI) extension instructions are enabled through +lut.  */
 #define TARGET_LUT AARCH64_HAVE_ISA (LUT)
diff --git a/gcc/config/aarch64/iterators.md b/gcc/config/aarch64/iterators.md
index e843c66cf268..9fbd74939882 100644
--- a/gcc/config/aarch64/iterators.md
+++ b/gcc/config/aarch64/iterators.md
@@ -3340,8 +3340,8 @@
 
 (define_int_iterator SVE_COND_FP_BINARY
   [UNSPEC_COND_FADD
-   (UNSPEC_COND_FAMAX "TARGET_SVE_FAMINMAX")
-   (UNSPEC_COND_FAMIN "TARGET_SVE_FAMINMAX")
+   (UNSPEC_COND_FAMAX "TARGET_FAMINMAX && TARGET_SVE2_OR_SME2")
+   (UNSPEC_COND_FAMIN "TARGET_FAMINMAX && TARGET_SVE2_OR_SME2")
    UNSPEC_COND_FDIV
    UNSPEC_COND_FMAX
    UNSPEC_COND_FMAXNM
@@ -3381,8 +3381,8 @@
                                            UNSPEC_COND_SMIN])
 
 (define_int_iterator SVE_COND_FP_BINARY_REG
-  [(UNSPEC_COND_FAMAX "TARGET_SVE_FAMINMAX")
-   (UNSPEC_COND_FAMIN "TARGET_SVE_FAMINMAX")
+  [(UNSPEC_COND_FAMAX "TARGET_FAMINMAX && TARGET_SVE2_OR_SME2")
+   (UNSPEC_COND_FAMIN "TARGET_FAMINMAX && TARGET_SVE2_OR_SME2")
    UNSPEC_COND_FDIV
    UNSPEC_COND_FMULX])
 
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/faminmax_1.c 
b/gcc/testsuite/gcc.target/aarch64/sve/faminmax_1.c
index 3b65ccea0656..154dbd9de846 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/faminmax_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/faminmax_1.c
@@ -3,7 +3,7 @@
 
 #include "arm_sve.h"
 
-#pragma GCC target "+sve+faminmax"
+#pragma GCC target "+sve2+faminmax"
 
 #define TEST_FAMAX(TYPE)                                               \
   void fn_famax_##TYPE (TYPE * restrict a,                             \
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/faminmax_2.c 
b/gcc/testsuite/gcc.target/aarch64/sve/faminmax_2.c
index d80f6eca8f82..44ecef1e0878 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/faminmax_2.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/faminmax_2.c
@@ -3,7 +3,7 @@
 
 #include "arm_sve.h"
 
-#pragma GCC target "+sve+faminmax"
+#pragma GCC target "+sve2+faminmax"
 
 #define TEST_WITH_SVMAX(TYPE)                                          \
   TYPE fn_fmax_##TYPE (TYPE x, TYPE y) {                               \
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/faminmax_3.c 
b/gcc/testsuite/gcc.target/aarch64/sve/faminmax_3.c
new file mode 100644
index 000000000000..2b01fa48b8e9
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/sve/faminmax_3.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+
+#include <arm_sve.h>
+
+#pragma GCC target ("arch=armv9.2-a+sve2")
+
+void
+test (svbool_t p, svfloat16_t a, svfloat16_t b)
+{
+  svamax_f16_m (p, a, b); /* { dg-error {ACLE function 'svamax_f16_m' requires 
ISA extension 'faminmax'} } */
+}

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