https://gcc.gnu.org/g:9e4e7275743b9a7588712923cef5872f109f30f7
commit 9e4e7275743b9a7588712923cef5872f109f30f7
Author: Michael Meissner <meiss...@linux.ibm.com>
Date: Thu May 22 15:08:12 2025 -0400
Revert changes
Diff:
---
gcc/config/rs6000/predicates.md | 6 +-
gcc/config/rs6000/rs6000-protos.h | 1 -
gcc/config/rs6000/rs6000.cc | 24 -----
gcc/config/rs6000/rs6000.h | 15 +--
gcc/config/rs6000/rs6000.md | 12 +--
gcc/testsuite/gcc.target/powerpc/pr118541.c | 147 ----------------------------
6 files changed, 13 insertions(+), 192 deletions(-)
diff --git a/gcc/config/rs6000/predicates.md b/gcc/config/rs6000/predicates.md
index 3a82113833c3..647e89afb6a7 100644
--- a/gcc/config/rs6000/predicates.md
+++ b/gcc/config/rs6000/predicates.md
@@ -1465,9 +1465,9 @@
;; Return 1 if OP is a comparison operator suitable for vector/scalar
;; comparisons that generate a 0/-1 mask (i.e. the inverse of
-;; fpmask_comparison_operator when the arguments are swapped).
-(define_predicate "fpmask_reverse_args_comparison_operator"
- (match_code "ne,lt,le"))
+;; fpmask_comparison_operator).
+(define_predicate "invert_fpmask_comparison_operator"
+ (match_code "ne,unlt,unle"))
;; Return 1 if OP is a comparison operation suitable for integer vector/scalar
;; comparisons that generate a -1/0 mask.
diff --git a/gcc/config/rs6000/rs6000-protos.h
b/gcc/config/rs6000/rs6000-protos.h
index f3cbfbfe5a13..4619142d197b 100644
--- a/gcc/config/rs6000/rs6000-protos.h
+++ b/gcc/config/rs6000/rs6000-protos.h
@@ -116,7 +116,6 @@ extern const char *rs6000_indirect_sibcall_template (rtx *,
unsigned int);
extern const char *rs6000_pltseq_template (rtx *, int);
extern enum rtx_code rs6000_reverse_condition (machine_mode,
enum rtx_code);
-extern enum rtx_code rs6000_fpmask_reverse_args (enum rtx_code);
extern rtx rs6000_emit_eqne (machine_mode, rtx, rtx, rtx);
extern rtx rs6000_emit_fp_cror (rtx_code, machine_mode, rtx);
extern void rs6000_emit_sCOND (machine_mode, rtx[]);
diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc
index 8eaca7988d80..11dfde7f288b 100644
--- a/gcc/config/rs6000/rs6000.cc
+++ b/gcc/config/rs6000/rs6000.cc
@@ -15379,30 +15379,6 @@ rs6000_reverse_condition (machine_mode mode, enum
rtx_code code)
return reverse_condition (code);
}
-/* Like reverse_condition, but return the condition code where the arguments
- are reversed. I.e. do not convert an unordered compare into an ordered
- compare. This is used for the fpmask operations in power9 to implement
- floating point conditional moves. */
-
-enum rtx_code
-rs6000_fpmask_reverse_args (enum rtx_code code)
-{
- switch (code)
- {
- case NE:
- return EQ;
-
- case LE:
- return GT;
-
- case LT:
- return GE;
-
- default:
- gcc_unreachable ();
- }
-}
-
/* Check if C (as 64bit integer) can be rotated to a constant which constains
nonzero bits at the LOWBITS low bits only.
diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h
index c8d9456e0912..9267612fbc9c 100644
--- a/gcc/config/rs6000/rs6000.h
+++ b/gcc/config/rs6000/rs6000.h
@@ -1810,17 +1810,10 @@ extern scalar_int_mode rs6000_pmode;
: (((OP) == EQ || (OP) == NE) && COMPARISON_P (X) \
? CCEQmode : CCmode))
-/* Can the condition code MODE be safely reversed? Don't allow floating point
- comparisons to be reversed unless NaNs are not allowed.
-
- In the past, we used to allow reversing FP operations because we only
- generated FCMPU comparisons and not FCMPO. However, starting with power9,
- the XSCMPEQDP, XSCMPGTDP, and XSCMPGEDP instructions will trap if a
- signalling NaN is used. If we allow reversing FP operations, we could wind
- up converting a LT operation into UNGE and the instruction will trap. The
- machine independent parts of the compiler will handle reversing the
- arguments if the FP comparison cannot be reversed. */
-#define REVERSIBLE_CC_MODE(MODE) ((MODE) != CCFPmode || flag_finite_math_only)
+/* Can the condition code MODE be safely reversed? This is safe in
+ all cases on this port, because at present it doesn't use the
+ trapping FP comparisons (fcmpo). */
+#define REVERSIBLE_CC_MODE(MODE) 1
/* Given a condition code and a mode, return the inverse condition. */
#define REVERSE_CONDITION(CODE, MODE) rs6000_reverse_condition (MODE, CODE)
diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index b5cc98bcb0eb..65da0c653304 100644
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -5734,7 +5734,7 @@
(define_insn_and_split "*mov<SFDF:mode><SFDF2:mode>cc_invert_p9"
[(set (match_operand:SFDF 0 "vsx_register_operand" "=&wa,wa")
(if_then_else:SFDF
- (match_operator:CCFP 1 "fpmask_reverse_args_comparison_operator"
+ (match_operator:CCFP 1 "invert_fpmask_comparison_operator"
[(match_operand:SFDF2 2 "vsx_register_operand" "wa,wa")
(match_operand:SFDF2 3 "vsx_register_operand" "wa,wa")])
(match_operand:SFDF 4 "vsx_register_operand" "wa,wa")
@@ -5754,7 +5754,7 @@
(match_dup 4)))]
{
rtx op1 = operands[1];
- enum rtx_code cond = rs6000_fpmask_reverse_args (GET_CODE (op1));
+ enum rtx_code cond = reverse_condition_maybe_unordered (GET_CODE (op1));
if (GET_CODE (operands[6]) == SCRATCH)
operands[6] = gen_reg_rtx (V2DImode);
@@ -5762,7 +5762,7 @@
operands[7] = CONSTM1_RTX (V2DImode);
operands[8] = CONST0_RTX (V2DImode);
- operands[9] = gen_rtx_fmt_ee (cond, CCFPmode, operands[3], operands[2]);
+ operands[9] = gen_rtx_fmt_ee (cond, CCFPmode, operands[2], operands[3]);
}
[(set_attr "length" "8")
(set_attr "type" "vecperm")])
@@ -5839,7 +5839,7 @@
(define_insn_and_split "*mov<mode>cc_invert_p10"
[(set (match_operand:IEEE128 0 "altivec_register_operand" "=&v,v")
(if_then_else:IEEE128
- (match_operator:CCFP 1 "fpmask_reverse_args_comparison_operator"
+ (match_operator:CCFP 1 "invert_fpmask_comparison_operator"
[(match_operand:IEEE128 2 "altivec_register_operand" "v,v")
(match_operand:IEEE128 3 "altivec_register_operand" "v,v")])
(match_operand:IEEE128 4 "altivec_register_operand" "v,v")
@@ -5859,7 +5859,7 @@
(match_dup 4)))]
{
rtx op1 = operands[1];
- enum rtx_code cond = rs6000_fpmask_reverse_args (GET_CODE (op1));
+ enum rtx_code cond = reverse_condition_maybe_unordered (GET_CODE (op1));
if (GET_CODE (operands[6]) == SCRATCH)
operands[6] = gen_reg_rtx (V2DImode);
@@ -5867,7 +5867,7 @@
operands[7] = CONSTM1_RTX (V2DImode);
operands[8] = CONST0_RTX (V2DImode);
- operands[9] = gen_rtx_fmt_ee (cond, CCFPmode, operands[3], operands[2]);
+ operands[9] = gen_rtx_fmt_ee (cond, CCFPmode, operands[2], operands[3]);
}
[(set_attr "length" "8")
(set_attr "type" "vecperm")])
diff --git a/gcc/testsuite/gcc.target/powerpc/pr118541.c
b/gcc/testsuite/gcc.target/powerpc/pr118541.c
deleted file mode 100644
index a38c94c8b7ed..000000000000
--- a/gcc/testsuite/gcc.target/powerpc/pr118541.c
+++ /dev/null
@@ -1,147 +0,0 @@
-/* { dg-do compile } */
-/* { dg-options "-mdejagnu-cpu=power9 -O2" } */
-/* { dg-require-effective-target powerpc_vsx } */
-
-/* PR target/118541 says that the ordered comparison functions like isgreater
- should not optimize floating point conditional moves to use
- x{s,v}cmp{eq,gt,ge}{dp,qp} and xxsel since that instruction can cause traps
- if one of the arguments is a signaling NaN. */
-
-/* Verify isgreater, isgreaterequal, isless, and islessequal does not generate
- xscmpltdp, xscmpgtdp, or xscmpeqdp. */
-
-double
-ordered_gt (double a, double b, double c, double d)
-{
- /*
- * fcmpu 0,1,2
- * fmr 1,4
- * bnglr 0
- * fmr 1,3
- * blr
- */
-
- return __builtin_isgreater (a, b) ? c : d;
-}
-
-double
-ordered_ge (double a, double b, double c, double d)
-{
- /*
- * fcmpu 0,1,2
- * fmr 1,4
- * cror 2,0,3
- * beqlr 0
- * fmr 1,3
- * blr
- */
-
- return __builtin_isgreaterequal (a, b) ? c : d;
-}
-
-double
-ordered_lt (double a, double b, double c, double d)
-{
- /*
- * fcmpu 0,1,2
- * fmr 1,4
- * bnllr 0
- * fmr 1,3
- * blr
- */
-
- return __builtin_isless (a, b) ? c : d;
-}
-
-double
-ordered_le (double a, double b, double c, double d)
-{
- /*
- * fcmpu 0,1,2
- * fmr 1,4
- * cror 2,1,3
- * beqlr 0
- * fmr 1,3
- * blr
- */
-
- return __builtin_islessequal (a, b) ? c : d;
-}
-
-double
-normal_gt (double a, double b, double c, double d)
-{
- /*
- * xscmpgtdp 1,1,2
- * xxsel 1,4,3,1
- * blr
- */
-
- return a > b ? c : d;
-}
-
-double
-normal_ge (double a, double b, double c, double d)
-{
- /*
- * xscmpgedp 1,1,2
- * xxsel 1,4,3,1
- * blr
- */
-
- return a >= b ? c : d;
-}
-
-double
-normal_lt (double a, double b, double c, double d)
-{
- /*
- * xscmpgtdp 1,2,1
- * xxsel 1,4,3,1
- * blr
- */
-
- return a < b ? c : d;
-}
-
-double
-normal_le (double a, double b, double c, double d)
-{
- /*
- * xscmpgedp 1,2,1
- * xxsel 1,4,3,1
- * blr
- */
-
- return a <= b ? c : d;
-}
-
-double
-normal_eq (double a, double b, double c, double d)
-{
- /*
- * xscmpeqdp 1,1,2
- * xxsel 1,4,3,1
- * blr
- */
-
- return a == b ? c : d;
-}
-
-double
-normal_ne (double a, double b, double c, double d)
-{
- /*
- * xscmpeqdp 1,1,2
- * xxsel 1,3,4,1
- * blr
- */
-
- return a != b ? c : d;
-}
-
-/* { dg-final { scan-assembler-times {\mxscmpudp\M|\mfcmpu\M} 4 } } */
-/* { dg-final { scan-assembler-times {\mxscmpeqdp\M} 2 } } */
-/* { dg-final { scan-assembler-times {\mxscmpgedp\M} 2 } } */
-/* { dg-final { scan-assembler-times {\mxscmpgtdp\M} 2 } } */
-/* { dg-final { scan-assembler-times {\mxxsel\M} 6 } } */
