https://gcc.gnu.org/g:1d88d08cff9b76f7378ed7d761c491bcb9395a4c

commit 1d88d08cff9b76f7378ed7d761c491bcb9395a4c
Author: Michael Meissner <meiss...@linux.ibm.com>
Date:   Tue Jul 29 11:46:41 2025 -0400

    Update ChangeLog.*

Diff:
---
 gcc/ChangeLog.bugs | 33 +++++++++++++++------------------
 1 file changed, 15 insertions(+), 18 deletions(-)

diff --git a/gcc/ChangeLog.bugs b/gcc/ChangeLog.bugs
index 2f4f7abe9827..bb008f0db672 100644
--- a/gcc/ChangeLog.bugs
+++ b/gcc/ChangeLog.bugs
@@ -1,4 +1,4 @@
-==================== Branch work216-bugs, patch #110  ====================
+==================== Branch work216-bugs, patch #111  ====================
 
 Fix PR 118541, do not generate floating point cmoves for IEEE compares.
 
@@ -32,7 +32,7 @@ GCC currently generates the following code:
         xxsel 1,0,12,1
         blr
 
-This is because ifcvt.c optimizes the conditional floating point move to use 
the
+This is because ifcvt.cc optimizes the conditional floating point move to use 
the
 XSCMPGTDP instruction.
 
 However, the XSCMPGTDP instruction will generate an interrupt if one of the
@@ -40,7 +40,7 @@ arguments is a signalling NaN and signalling NaNs can 
generate an interrupt.
 The IEEE comparison functions (isgreater, etc.) require that the comparison not
 raise an interrupt.
 
-The following patch changes the PowerPC back end so that ifcvt.c will not 
change
+The following patch changes the PowerPC back end so that ifcvt.cc will not 
change
 the if/then test and move into a conditional move if the comparison is one of
 the comparisons that do not raise an error with signalling NaNs and -Ofast is
 not used.  If a normal comparison is used or -Ofast is used, GCC will continue
@@ -84,36 +84,33 @@ power11:
 gcc/
 
        PR target/118541
-       * config/rs6000/predicates.md (fpmask_comparison_operator): Add NE, LT,
-       LE.
-       (invert_fpmask_comparison_operator): Delete.
+       * config/rs6000/predicates.md (fpmask_comparison_operator): Add 
comments.
+       (invert_fpmask_comparison_operator): Delete, ifcvt.cc will handle
+       inverting the comparison operator.
        * config/rs6000/rs6000-protos.h (enum rev_cond_allowed): New 
enumeration.
        (rs6000_reverse_condition): Add argument.
-       * config/rs6000/rs6000.cc (rs6000_reverse_condition): Do not allow
-       comparisons to be reversed for floating point conditional moves that
-       involve IEEE comparison functions which cannot trap on signaling NaNs.
-       If this is a jump, we allow the comparison to be reversed.
+       * config/rs6000/rs6000.cc (rs6000_reverse_condition): Add argument which
+       controls whether comparisons can be reversed for floating point
+       conditional moves that involve IEEE comparison functions which cannot
+       trap on signaling NaNs.  If this is a jump, we allow the comparison to
+       be reversed.
        (rs6000_emit_sCOND): Adjust rs6000_reverse_condition call to not allow
        reversing floating point comparisons that involve IEEE comparison
        functions.
        * config/rs6000/rs6000.h (REVERSE_CONDITION): Likewise.
        * config/rs6000/rs6000.md (mov<SFDF:mode><SFDF2:mode>cc_invert_p9):
        Delete insn.
-       (fpmask<mode>, SFDF iterator): Allow NE, LT, and LE comparisons,
-       reversing the arguments and the comprison operation.
        (mov<mode>cc_invert_p10): Delete insn.
-       (fpmask<mode>, IEEE128 iterator): Allow NE, LT, and LE comparisons,
-       reversing the arguments and the comprison operation.
-       (reverse_branch_comparison): Name insn.
-       Adjust rs6000_reverse_condition calls.
+       (reverse_branch_comparison): Name insn.  Adjust rs6000_reverse_condition
+       calls.
 
 gcc/testsuite/
 
        PR target/118541
        * gcc.target/powerpc/pr118541-1.c: New test.
        * gcc.target/powerpc/pr118541-2.c: Likewise.
-       * gcc.target/powerpc/pr118541-3.c: Likewise.
-       * gcc.target/powerpc/pr118541-4.c: Likewise.
+
+==================== Branch work216-bugs, patch #110 was reverted  
====================
 
 ==================== Branch work216-bugs, patch #102  ====================

Reply via email to