https://gcc.gnu.org/g:50cc4bf90fef1e50e485dce45912f6351baf8cb1
commit 50cc4bf90fef1e50e485dce45912f6351baf8cb1 Author: Michael Meissner <[email protected]> Date: Fri Oct 3 15:27:45 2025 -0400 Attempt to add support for adding BFmode constants. 2025-10-03 Michael Meissner <[email protected]> gcc/ * config/rs6000/float16.md (mov<mode>_xxspltiw): Prefer VSX registers over GPRs; reorder register preferences; and use pli to load large constants to GPR registers. Diff: --- gcc/config/rs6000/float16.md | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/gcc/config/rs6000/float16.md b/gcc/config/rs6000/float16.md index e0a946d6c6d9..f30f0fbc6b64 100644 --- a/gcc/config/rs6000/float16.md +++ b/gcc/config/rs6000/float16.md @@ -65,8 +65,8 @@ ;; On power10, we can load up HFmode and BFmode constants with xxspltiw ;; or pli. (define_insn "*mov<mode>_xxspltiw" - [(set (match_operand:FP16 0 "gpc_reg_operand" "=wa,r,wa,r") - (match_operand:FP16 1 "fp16_xxspltiw_constant" "j,j,eP,eP"))] + [(set (match_operand:FP16 0 "gpc_reg_operand" "=wa,wa,?r,?r") + (match_operand:FP16 1 "fp16_xxspltiw_constant" "j,eP,j,eP"))] "TARGET_POWER10 && TARGET_PREFIXED" { rtx op1 = operands[1]; @@ -82,10 +82,10 @@ operands[2] = GEN_INT (real_words[0]); return (vsx_register_operand (operands[0], <MODE>mode) ? "xxspltiw %x0,%2" - : "li %0,%2"); + : "pli %0,%2"); } - [(set_attr "type" "vecsimple,*,vecperm,*") - (set_attr "prefixed" "no,no,yes,no")]) + [(set_attr "type" "vecsimple,vecsimple,*,*") + (set_attr "prefixed" "no,yes,no,yes")]) (define_insn "*mov<mode>_internal" [(set (match_operand:FP16 0 "nonimmediate_operand"
