https://gcc.gnu.org/g:b8f35edc8e963e9212345fb9e4d2c934afb2fc1c
commit r15-10419-gb8f35edc8e963e9212345fb9e4d2c934afb2fc1c Author: Haochen Jiang <[email protected]> Date: Wed Oct 15 14:05:07 2025 +0800 i386: Correct ISA set for Panther Lake and Diamond Rapids In ISE, Panther Lake does not enable PREFETCHI and Diamond Rapids does not enable USER_MSR. Correct them accordingly. I will backport the patch to GCC15/14. For GCC14, only PTL will be backported. gcc/ChangeLog: * config/i386/i386.h (PTA_PANTHERLAKE): Remove PREFETCHI. (PTA_DIAMONDRAPIDS): Remove USER_MSR. * doc/invoke.texi: Correct documentation. Diff: --- gcc/config/i386/i386.h | 4 ++-- gcc/doc/invoke.texi | 6 +++--- 2 files changed, 5 insertions(+), 5 deletions(-) diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h index 64f917f78b65..a063500139bd 100644 --- a/gcc/config/i386/i386.h +++ b/gcc/config/i386/i386.h @@ -2446,7 +2446,7 @@ constexpr wide_int_bitmask PTA_CLEARWATERFOREST = (PTA_SIERRAFOREST & (~(PTA_KL | PTA_WIDEKL))) | PTA_AVXVNNIINT16 | PTA_SHA512 | PTA_SM3 | PTA_SM4 | PTA_USER_MSR | PTA_PREFETCHI; constexpr wide_int_bitmask PTA_PANTHERLAKE = - (PTA_ARROWLAKE_S & (~(PTA_KL | PTA_WIDEKL))) | PTA_PREFETCHI; + (PTA_ARROWLAKE_S & (~(PTA_KL | PTA_WIDEKL))); constexpr wide_int_bitmask PTA_DIAMONDRAPIDS = PTA_SKYLAKE | PTA_PKU | PTA_SHA | PTA_GFNI | PTA_VAES | PTA_VPCLMULQDQ | PTA_RDPID | PTA_PCONFIG | PTA_WBNOINVD | PTA_CLWB | PTA_MOVDIRI | PTA_MOVDIR64B | PTA_ENQCMD @@ -2456,7 +2456,7 @@ constexpr wide_int_bitmask PTA_DIAMONDRAPIDS = PTA_SKYLAKE | PTA_PKU | PTA_SHA | PTA_AVX10_1 | PTA_AVXIFMA | PTA_AVXNECONVERT | PTA_AVXVNNIINT16 | PTA_AVXVNNIINT8 | PTA_CMPCCXADD | PTA_SHA512 | PTA_SM3 | PTA_SM4 | PTA_AVX10_2 | PTA_APX_F | PTA_AMX_AVX512 | PTA_AMX_FP8 | PTA_AMX_TF32 - | PTA_MOVRS | PTA_AMX_MOVRS | PTA_USER_MSR; + | PTA_MOVRS | PTA_AMX_MOVRS; constexpr wide_int_bitmask PTA_BDVER1 = PTA_64BIT | PTA_MMX | PTA_SSE | PTA_SSE2 | PTA_SSE3 | PTA_SSE4A | PTA_CX16 | PTA_ABM | PTA_SSSE3 diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index 5b2ff2c8fadd..4f4313151867 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -35188,8 +35188,8 @@ SSSE3, SSE4.1, SSE4.2, POPCNT, AES, PREFETCHW, PCLMUL, RDRND, XSAVE, XSAVEC, XSAVES, XSAVEOPT, FSGSBASE, PTWRITE, RDPID, SGX, GFNI-SSE, CLWB, MOVDIRI, MOVDIR64B, WAITPKG, ADCX, AVX, AVX2, BMI, BMI2, F16C, FMA, LZCNT, PCONFIG, PKU, VAES, VPCLMULQDQ, SERIALIZE, HRESET, AVX-VNNI, UINTR, AVXIFMA, AVXVNNIINT8, -AVXNECONVERT, CMPCCXADD, AVXVNNIINT16, SHA512, SM3, SM4 and PREFETCHI -instruction set support. +AVXNECONVERT, CMPCCXADD, AVXVNNIINT16, SHA512, SM3 and SM4 instruction set +support. @item sapphirerapids @itemx emeraldrapids @@ -35236,7 +35236,7 @@ MOVDIRI, MOVDIR64B, ENQCMD, CLDEMOTE, PTWRITE, WAITPKG, SERIALIZE, TSXLDTRK, UINTR, AMX-BF16, AMX-TILE, AMX-INT8, AVX-VNNI, AVX512FP16, AVX512BF16, AMX-FP16, PREFETCHI, AMX-COMPLEX, AVX10.1-512, AVX-IFMA, AVX-NE-CONVERT, AVX-VNNI-INT16, AVX-VNNI-INT8, CMPccXADD, SHA512, SM3, SM4, AVX10.2-512, APX_F, AMX-AVX512, -AMX-FP8, AMX-TF32, MOVRS, AMX-MOVRS and USER_MSR instruction set support. +AMX-FP8, AMX-TF32, MOVRS and AMX-MOVRS instruction set support. @item bonnell @itemx atom
