https://gcc.gnu.org/g:2a14b3538cc81d0758e9364e48298158d79c6a72

commit 2a14b3538cc81d0758e9364e48298158d79c6a72
Author: Michael Meissner <[email protected]>
Date:   Tue Oct 7 23:40:07 2025 -0400

    Update ChangeLog.*

Diff:
---
 gcc/ChangeLog.float | 22 ++++++++++++++++++++++
 1 file changed, 22 insertions(+)

diff --git a/gcc/ChangeLog.float b/gcc/ChangeLog.float
index 2f710d6828f5..a8ac076f6359 100644
--- a/gcc/ChangeLog.float
+++ b/gcc/ChangeLog.float
@@ -1,3 +1,25 @@
+==================== Branch work222-float, patch #321 ====================
+
+Add power8 support for 16-bit floating point.
+
+2025-10-07  Michael Meissner  <[email protected]>
+
+gcc/
+
+       * config/rs6000/float16.md (neg<mode>2): Require hardware support for
+       the 16-bit floating point type.
+       (xor<mode>3): Likewise.
+       (abs<mode>2): Likewise.
+       (andc<mode>3): Likewise.
+       (nabs<mode>2): Likewise.
+       (ior<mode>3): Likewise.
+       * config/rs6000/rs6000-p8swap.cc (rs6000_gen_stvx): Add support for
+       V8HFmode and V8BFmode.
+       (rs6000_gen_lvx): Likewise.
+       (replace_swapped_load_constant): Likewise.
+       * config/rs6000/rs6000.md (rs6000_option_override_internal): Make
+       -mcpu=power8 the minimum for 16-bit floating point.
+
 ==================== Branch work222-float, patch #320 ====================
 
 Eliminate -mfloat16 and -mbfloat16 checks on vector types.

Reply via email to