https://gcc.gnu.org/g:8e5b9fac62fbe84b2386f27cd8b567f42351b395
commit 8e5b9fac62fbe84b2386f27cd8b567f42351b395 Author: Michael Meissner <[email protected]> Date: Tue Oct 21 23:02:48 2025 -0400 Update ChangeLog.* Diff: --- gcc/ChangeLog.test | 179 ++++++++++++++++++++++++++++++++++++++++++++++ libgcc/ChangeLog.meissner | 51 +++++++++++++ 2 files changed, 230 insertions(+) diff --git a/gcc/ChangeLog.test b/gcc/ChangeLog.test index 73147a8462de..9187f9165cd1 100644 --- a/gcc/ChangeLog.test +++ b/gcc/ChangeLog.test @@ -1,3 +1,182 @@ +==================== Branch work223-test, patch #401 ==================== + +Add HF/BF emulation functions to libgcc. + +2025-10-21 Michael Meissner <[email protected]> + +libgcc/ + + * config.host (powerpc*-*-linux*): Add HF/BF emulation functions to + PowerPC libgcc. + * config/rs6000/sfp-machine.h (_FP_NANFRAC_H): New macro. + (_FP_NANFRAC_B): Likewise. + (_FP_NANSIGN_H): Likewise. + (_FP_NANSIGN_B): Likewise. + (DFtype2): Add HF/BF emulation function declarations. + (SFtype2): Likewise. + (DItype2): Likewise. + (UDItype2): Likewise. + (SItype2): Likewise. + (USItype2): Likewise. + (HFtype2): Likewise. + (__eqhf2): Likewise. + (__extendhfdf2): Likewise. + (__extendhfsf2): Likewise. + (__fixhfdi): Likewise. + (__fixhfsi): Likewise. + (__fixunshfdi): Likewise. + (__fixunshfsi): Likewise. + (__floatdihf): Likewise. + (__floatsihf): Likewise. + (__floatundihf): Likewise. + (__floatunsihf): Likewise. + (__truncdfhf2): Likewise. + (__truncsfhf2): Likewise. + (BFtype2): Likewise. + (__extendbfsf2): Likewise. + (__floatdibf): Likewise. + (__floatsibf): Likewise. + (__floatundibf): Likewise. + (__floatunsibf): Likewise. + (__truncdfbf2): Likewise. + (__truncsfbf2): Likewise. + (__truncbfhf2): Likewise. + (__trunchfbf2): Likewise. + * config/rs6000/t-bfloat16: New file. + * config/rs6000/t-both-fp16: Likewise. + * config/rs6000/t-float16: Likewise. + * configure.ac (powerpc*-*-linux*): Check if the PowerPC compiler + supports _Float16 and __bfloat16 types. + * configure: Regenerate. + +==================== Branch work223-test, patch #400 ==================== + +Add initial _Float16 and __bfloat16 support. + +2025-10-21 Michael Meissner <[email protected]> + +gcc/ + + * config/rs6000/altivec.md (VM): Add support for the V8HFmode and + V8BFmode vector types used for 16-bit floating point. + (VM2): Likewise. + (VI_char): Likewise. + (VI_scalar): Likewise. + (VI_char): Likewise. + (VP_small): Likewise. + (VP_small_lc): Likewise. + (VU_char): Likewise. + * config/rs6000/float16.md: New file for 16-bit floating point support. + * config/rs6000/predicates.md (fp16_xxspltiw_constant): New predicate. + * config/rs6000/rs6000-builtin.cc (rs6000_type_string): Add support for + _Float16 and __bfloat16 types. + (rs6000_init_builtins): Define the __bfloat16 type if -mbfloat16. + * config/rs6000/rs6000-c.cc (rs6000_target_modify_macros): Define + __FLOAT16__ if -mfloat16. Define __BFLOAT16__ if -mbfloat16. + * config/rs6000/rs6000-call.cc (init_cumulative_args): Warn if 16-bit + floating point types are passed or returned unless -Wno-psabi is used. + (rs6000_function_arg): Likewise. + * config/rs6000/rs6000-cpus.def (ISA_3_0_MASKS_SERVER): Add a comment + for setting -mfloat16 in the future for -mcpu=power9. + (OTHER_POWER10_MASKS): Add a comment for setting -mbfloat16 for + -mcpu=power10. + (POWERPC_MASKS): Make -mfloat16 and -mbfloat16 target masks. + * config/rs6000/rs6000-modes.def (BFmode): Define modes relating to + 16-bit floating point. + (HFmode): Likewise. + (V8BFmode): Likewise. + (V8HFmode): Likewise. + (V4HFmode): Likewise. + (V4BFmode): Likewise. + * config/rs6000/rs6000-p8swap.cc (rs6000_gen_stvx): Remove #ifdef for + V8HFmode, since we now support it. Add support for V8BFmode. + (rs6000_gen_lvx): Likewise. + (replace_swapped_load_constant): Likewise. + * config/rs6000/rs6000-protos.h (vec_const_128bit_type): Add mode field + for recognizing 16-bit floating point constants. + * config/rs6000/rs6000.cc (rs6000_hard_regno_mode_ok_uncached): Add + support for the _Float16 and __bfloat16 scalr/vector types. + (rs6000_modes_tieable_p): Likewise. + (rs6000_debug_reg_global): Likewise. + (rs6000_setup_reg_addr_masks): Likewise. + (rs6000_init_hard_regno_mode_ok): Likewise. + (rs6000_option_override_internal): Add consistancy checks for -mfloat16 + and -mbfloat16. + (xxspltib_constant_p): Add support for V8HFmode and V8BFmode all 0 + vector mode constants. + (output_vec_const_move): Add 16-bit floating point scalar/vector + support. + (rs6000_expand_vector_init): Likewise. + (reg_offset_addressing_ok_p): Likewise. + (rs6000_legitimate_offset_address_p): Likewise. + (legitimate_lo_sum_address_p): Likewise. + (rs6000_const_vec): Likewise. + (rs6000_emit_move): Likewise. + (rs6000_secondary_reload_simple_move): Likewise. + (rs6000_can_change_mode_class): Likewise. + (rs6000_load_constant_and_splat): Likewise. + (rs6000_scalar_mode_supported_p): Likewise. + (rs6000_floatn_mode): Likewise. + (rs6000_opt_masks): Add -mfloat16 and -mbfloat16. + (constant_fp_to_128bit_vector): Add 16-bit floating point scalar/vector + support. + * config/rs6000/rs6000.h (FP16_SCALAR_MODE_P): New macro. + (FP16_VECTOR_MODE_P): Likewise. + (ALTIVEC_VECTOR_MODE): Add V8HFmode and V8BFmode. + * config/rs6000/rs6000.md (FMOVE128_GPR): Add V8HFmode, V8BFmode, + HFmode, and BFmode modes. + (wd): Likewise. + (du_or_d): Likewise. + (BOOL_128): Likewise. + (BOOL_REGS_OUTPUT): Likewise. + (BOOL_REGS_OP1): Likewise. + (BOOL_REGS_OP2): Likewise. + (BOOL_REGS_UNARY): Likewise. + (RELOAD): Likewise. + (toplevel): Include float16.md. + * config/rs6000/rs6000.opt (-mfloat16): New switch. + (-mbfloat16): Likewise. + * config/rs6000/vector.md (VEC_L): Add V8HFmode and V8BFmode. + (VEC_M): Likewise. + (VEC_E): Likewise. + (VEC_base): Likewise. + (VEC_base_l): Likewise. + * config/rs6000/vsx.md (VECTOR_16BIT): New mode iterator. + (VSX_L): Add V8HFmode and V8BFmode. + (VSX_M): Likewise. + (VSX_XXBR): Likewise. + (VSm): Likewise. + (VSr): Likewise. + (VSisa): Likewise. + (??r): Likewise. + (nW): Likewise. + (VSv): Likewise. + (VM3): Likewise. + (VM3_char): Likewise. + (vsx_le_perm_load_v8hi): Convert the V8HImode permute insns to also + handle V8HFmode and V8BFmode modes. + (vsx_le_perm_load_<mode>): Likewise. + (vsx_le_perm_store_v8hi): Likewise. + (vsx_le_perm_store_<mode>): Likewise. + (V8??mode splitter): Likewise. + (vsx_ld_elemrev_v8hi): Likewise. + (vsx_ld_elemrev_<mode>): Likewise. + (vsx_ld_elemrev_v8hi): Likewise. + (vsx_ld_elemrev_v8hi_internal): Likewise. + (vsx_ld_elemrev_<mode>_interna): Likewise. + (vsx_st_elemrev_v8hi): Likewise. + (vsx_st_elemrev_<mode): Likewise. + (vsx_st_elemrev_v8hi): Likewise. + (vsx_st_elemrev_<mode>_interna): Likewise. + (xxswapd_v8hi): Likewise. + (xxswapd_<mode>): Likewise. + (vsx_lxvd2x8_le_V8HI): Likewise. + (vsx_lxvd2x8_le_<MODE): Likewise. + (vsx_stxvd2x8_le_V8HI): Likewise. + (vsx_stxvd2x8_le_<MODE>): Likewise. + (vsx_extract_<mode>_store_p9): Likewise. + (vsx_extract_<mode>_p8): Likewise. + ==================== Branch work223-test, baseline ==================== 2025-10-20 Michael Meissner <[email protected]> diff --git a/libgcc/ChangeLog.meissner b/libgcc/ChangeLog.meissner index 0d82ea4ddd71..60fefd4e5370 100644 --- a/libgcc/ChangeLog.meissner +++ b/libgcc/ChangeLog.meissner @@ -1,3 +1,54 @@ +==================== Branch work223-test, patch #401 ==================== + +Add HF/BF emulation functions to libgcc. + +2025-10-21 Michael Meissner <[email protected]> + +libgcc/ + + * config.host (powerpc*-*-linux*): Add HF/BF emulation functions to + PowerPC libgcc. + * config/rs6000/sfp-machine.h (_FP_NANFRAC_H): New macro. + (_FP_NANFRAC_B): Likewise. + (_FP_NANSIGN_H): Likewise. + (_FP_NANSIGN_B): Likewise. + (DFtype2): Add HF/BF emulation function declarations. + (SFtype2): Likewise. + (DItype2): Likewise. + (UDItype2): Likewise. + (SItype2): Likewise. + (USItype2): Likewise. + (HFtype2): Likewise. + (__eqhf2): Likewise. + (__extendhfdf2): Likewise. + (__extendhfsf2): Likewise. + (__fixhfdi): Likewise. + (__fixhfsi): Likewise. + (__fixunshfdi): Likewise. + (__fixunshfsi): Likewise. + (__floatdihf): Likewise. + (__floatsihf): Likewise. + (__floatundihf): Likewise. + (__floatunsihf): Likewise. + (__truncdfhf2): Likewise. + (__truncsfhf2): Likewise. + (BFtype2): Likewise. + (__extendbfsf2): Likewise. + (__floatdibf): Likewise. + (__floatsibf): Likewise. + (__floatundibf): Likewise. + (__floatunsibf): Likewise. + (__truncdfbf2): Likewise. + (__truncsfbf2): Likewise. + (__truncbfhf2): Likewise. + (__trunchfbf2): Likewise. + * config/rs6000/t-bfloat16: New file. + * config/rs6000/t-both-fp16: Likewise. + * config/rs6000/t-float16: Likewise. + * configure.ac (powerpc*-*-linux*): Check if the PowerPC compiler + supports _Float16 and __bfloat16 types. + * configure: Regenerate. + ==================== Branch work223, baseline ==================== 2025-10-20 Michael Meissner <[email protected]>
