https://gcc.gnu.org/g:b83b5f2a1665f54ed40d955b7f37a3e357e77ad8
commit b83b5f2a1665f54ed40d955b7f37a3e357e77ad8 Author: Michael Meissner <[email protected]> Date: Sat Nov 1 04:22:11 2025 -0400 Fix HFmode and BFmode logical operations. 2025-11-01 Michael Meissner <[email protected]> gcc/ * config/rs6000/float16.md (boolc<mode>3): Use FP16 mode, not GPR. (boolcc<mode>3): Likewise. Diff: --- gcc/config/rs6000/float16.md | 29 ++++++++++++++++++++--------- 1 file changed, 20 insertions(+), 9 deletions(-) diff --git a/gcc/config/rs6000/float16.md b/gcc/config/rs6000/float16.md index 2cc5dd400086..b62cd3315143 100644 --- a/gcc/config/rs6000/float16.md +++ b/gcc/config/rs6000/float16.md @@ -675,22 +675,33 @@ ;; ANDC, IORC, and EQV insns. (define_insn "*boolc<mode>3" - [(set (match_operand:GPR 0 "gpc_reg_operand" "=wa,r") - (match_operator:GPR 3 "boolean_operator" - [(not:GPR (match_operand:GPR 2 "gpc_reg_operand" "wa,r")) - (match_operand:GPR 1 "gpc_reg_operand" "wa,r")]))] + [(set (match_operand:FP16 0 "gpc_reg_operand" "=wa,r") + (match_operator:FP16 3 "boolean_operator" + [(not:FP16 (match_operand:FP16 2 "gpc_reg_operand" "wa,r")) + (match_operand:FP16 1 "gpc_reg_operand" "wa,r")]))] "" "@ - xxl%q3 %x0,%x1,%x0 + xxl%q3 %x0,%x1,%x2 + %q3 %0,%1,%2" + [(set_attr "type" "veclogical,logical")]) + +(define_insn "*boolc<mode>3" + [(set (match_operand:FP16 0 "gpc_reg_operand" "=wa,r") + (match_operator:FP16 3 "boolean_operator" + [(match_operand:FP16 1 "gpc_reg_operand" "wa,r") + (not:FP16 (match_operand:FP16 2 "gpc_reg_operand" "wa,r"))]))] + "" + "@ + xxl%q3 %x0,%x1,%x2 %q3 %0,%1,%2" [(set_attr "type" "veclogical,logical")]) ;; NOR and NAND insns. (define_insn "*boolcc<mode>3" - [(set (match_operand:GPR 0 "gpc_reg_operand" "=wa,r") - (match_operator:GPR 3 "boolean_operator" - [(not:GPR (match_operand:GPR 1 "gpc_reg_operand" "wa,r")) - (not:GPR (match_operand:GPR 2 "gpc_reg_operand" "wa,r"))]))] + [(set (match_operand:FP16 0 "gpc_reg_operand" "=wa,r") + (match_operator:FP16 3 "boolean_operator" + [(not:FP16 (match_operand:FP16 1 "gpc_reg_operand" "wa,r")) + (not:FP16 (match_operand:FP16 2 "gpc_reg_operand" "wa,r"))]))] "" "@ xxl%q3 %x0,%x1,%x2
