https://gcc.gnu.org/g:2fff62e4ec752da9158ab970609802c22c6c3b4d
commit 2fff62e4ec752da9158ab970609802c22c6c3b4d Author: Michael Meissner <[email protected]> Date: Mon Nov 10 17:17:11 2025 -0500 Add conversions between _Float16 and float/double. This patch adds support to generate xscvhpdp and xscvdphp on Power9 systems and later, to convert between _Float16 and float scalar values. 2025-11-10 Michael Meissner <[email protected]> gcc/ * config/rs6000/float16.md (FP16_HW): New mode iterator. (extendhf<mode>2): Add support converting between HFmode and SFmode/DFmoded if we are on power9 or later. (trunc<mode>hf2): Likewise. * config/rs6000/rs6000-c.cc (rs6000_target_modify_macros): Define __FLOAT16_HW__ if we have hardware support for _Float16. Diff: --- gcc/config/rs6000/float16.md | 22 ++++++++++++++++++++++ gcc/config/rs6000/rs6000-c.cc | 3 +++ 2 files changed, 25 insertions(+) diff --git a/gcc/config/rs6000/float16.md b/gcc/config/rs6000/float16.md index fec4bb87fd09..13f3b32e86c1 100644 --- a/gcc/config/rs6000/float16.md +++ b/gcc/config/rs6000/float16.md @@ -25,6 +25,10 @@ (define_mode_iterator FP16 [(BF "TARGET_FLOAT16") (HF "TARGET_FLOAT16")]) +;; Mode iterator for 16-bit floating point modes on machines with +;; hardware support both as a scalar and as a vector. +(define_mode_iterator FP16_HW [(HF "TARGET_FLOAT16_HW")]) + ;; Mode attribute giving the vector mode for a 16-bit floating point ;; scalar in both upper and lower case. (define_mode_attr FP16_VECTOR8 [(BF "V8BF") @@ -122,3 +126,21 @@ } [(set_attr "type" "veclogical,vecperm") (set_attr "prefixed" "*,yes")]) + +;; Convert IEEE 16-bit floating point to/from other floating point modes. + +(define_insn "extendhf<mode>2" + [(set (match_operand:SFDF 0 "vsx_register_operand" "=wa") + (float_extend:SFDF + (match_operand:HF 1 "vsx_register_operand" "wa")))] + "TARGET_FLOAT16_HW" + "xscvhpdp %x0,%x1" + [(set_attr "type" "fpsimple")]) + +(define_insn "trunc<mode>hf2" + [(set (match_operand:HF 0 "vsx_register_operand" "=wa") + (float_truncate:HF + (match_operand:SFDF 1 "vsx_register_operand" "wa")))] + "TARGET_FLOAT16_HW" + "xscvdphp %x0,%x1" + [(set_attr "type" "fpsimple")]) diff --git a/gcc/config/rs6000/rs6000-c.cc b/gcc/config/rs6000/rs6000-c.cc index a9e611d3488a..e7091dd434b5 100644 --- a/gcc/config/rs6000/rs6000-c.cc +++ b/gcc/config/rs6000/rs6000-c.cc @@ -594,6 +594,9 @@ rs6000_target_modify_macros (bool define_p, { rs6000_define_or_undefine_macro (define_p, "__FLOAT16__"); rs6000_define_or_undefine_macro (define_p, "__BFLOAT16__"); + + if ((flags & OPTION_MASK_P9_VECTOR) != 0) + rs6000_define_or_undefine_macro (define_p, "__FLOAT16_HW__"); } /* Tell the user if we are targeting CELL. */ if (rs6000_cpu == PROCESSOR_CELL)
